634 lines
15 KiB
C
634 lines
15 KiB
C
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#include <string.h>
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#include "FreeRTOS.h"
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#include "chip.h"
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#include "board.h"
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#include "errno.h"
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#include "timer.h"
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#ifdef ANALOG_I2C_SUPPORT
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struct i2c_gpio_private_data {
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struct i2c_adapter adap;
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struct i2c_algo_bit_data bit_data;
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struct i2c_gpio_platform_data pdata;
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};
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/* Toggle SDA by changing the direction of the pin */
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static void i2c_gpio_setsda_dir(void *data, int state)
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{
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struct i2c_gpio_platform_data *pdata = data;
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if (state)
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gpio_direction_input(pdata->sda_pin);
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else
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gpio_direction_output(pdata->sda_pin, 0);
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}
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/*
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* Toggle SDA by changing the output value of the pin. This is only
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* valid for pins configured as open drain (i.e. setting the value
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* high effectively turns off the output driver.)
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*/
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static void i2c_gpio_setsda_val(void *data, int state)
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{
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struct i2c_gpio_platform_data *pdata = data;
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gpio_direction_output(pdata->sda_pin, state);
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gpio_set_value(pdata->sda_pin, state);
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}
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/* Toggle SCL by changing the direction of the pin. */
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static void i2c_gpio_setscl_dir(void *data, int state)
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{
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struct i2c_gpio_platform_data *pdata = data;
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if (state)
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gpio_direction_input(pdata->scl_pin);
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else
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gpio_direction_output(pdata->scl_pin, 0);
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}
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/*
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* Toggle SCL by changing the output value of the pin. This is used
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* for pins that are configured as open drain and for output-only
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* pins. The latter case will break the i2c protocol, but it will
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* often work in practice.
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*/
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static void i2c_gpio_setscl_val(void *data, int state)
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{
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struct i2c_gpio_platform_data *pdata = data;
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gpio_direction_output(pdata->scl_pin, state);
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gpio_set_value(pdata->scl_pin, state);
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}
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static int i2c_gpio_getsda(void *data)
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{
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struct i2c_gpio_platform_data *pdata = data;
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gpio_direction_input(pdata->sda_pin);
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return gpio_get_value(pdata->sda_pin);
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}
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static int i2c_gpio_getscl(void *data)
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{
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struct i2c_gpio_platform_data *pdata = data;
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gpio_direction_input(pdata->scl_pin);
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return gpio_get_value(pdata->scl_pin);
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}
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/* --- setting states on the bus with the right timing: --------------- */
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#define setsda(adap, val) adap->setsda(adap->data, val)
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#define setscl(adap, val) adap->setscl(adap->data, val)
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#define getsda(adap) adap->getsda(adap->data)
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#define getscl(adap) adap->getscl(adap->data)
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static __INLINE void sdalo(struct i2c_algo_bit_data *adap)
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{
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setsda(adap, 0);
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udelay((adap->udelay + 1) / 2);
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}
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static __INLINE void sdahi(struct i2c_algo_bit_data *adap)
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{
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setsda(adap, 1);
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udelay((adap->udelay + 1) / 2);
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}
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static __INLINE void scllo(struct i2c_algo_bit_data *adap)
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{
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setscl(adap, 0);
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udelay(adap->udelay / 2);
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}
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/*
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* Raise scl line, and do checking for delays. This is necessary for slower
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* devices.
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*/
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static int sclhi(struct i2c_algo_bit_data *adap)
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{
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unsigned long start;
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setscl(adap, 1);
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/* Not all adapters have scl sense line... */
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if (!adap->getscl)
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goto done;
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start = xTaskGetTickCount();
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while (!getscl(adap)) {
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/* This hw knows how to read the clock line, so we wait
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* until it actually gets high. This is safer as some
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* chips may hold it low ("clock stretching") while they
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* are processing data internally.
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*/
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if (xTaskGetTickCount() > start + adap->timeout) {
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/* Test one last time, as we may have been preempted
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* between last check and timeout test.
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*/
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if (getscl(adap))
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break;
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return -ETIMEDOUT;
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}
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taskYIELD();
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}
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done:
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udelay(adap->udelay);
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return 0;
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}
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/* --- other auxiliary functions -------------------------------------- */
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static void i2c_start(struct i2c_algo_bit_data *adap)
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{
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/* assert: scl, sda are high */
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setsda(adap, 0);
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udelay(adap->udelay);
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scllo(adap);
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}
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static void i2c_repstart(struct i2c_algo_bit_data *adap)
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{
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/* assert: scl is low */
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sdahi(adap);
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sclhi(adap);
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setsda(adap, 0);
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udelay(adap->udelay);
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scllo(adap);
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}
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static void i2c_stop(struct i2c_algo_bit_data *adap)
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{
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/* assert: scl is low */
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sdalo(adap);
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sclhi(adap);
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setsda(adap, 1);
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udelay(adap->udelay);
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}
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/* send a byte without start cond., look for arbitration,
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check ackn. from slave */
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/* returns:
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* 1 if the device acknowledged
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* 0 if the device did not ack
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* -ETIMEDOUT if an error occurred (while raising the scl line)
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*/
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static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
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{
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int i;
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int sb;
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int ack;
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
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/* assert: scl is low */
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for (i = 7; i >= 0; i--) {
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sb = (c >> i) & 1;
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setsda(adap, sb);
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udelay((adap->udelay + 1) / 2);
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if (sclhi(adap) < 0) { /* timed out */
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TRACE_DEBUG("i2c_outb: 0x%02x, timeout at bit #%d\n", (int)c, i);
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return -ETIMEDOUT;
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}
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/* FIXME do arbitration here:
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* if (sb && !getsda(adap)) -> ouch! Get out of here.
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*
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* Report a unique code, so higher level code can retry
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* the whole (combined) message and *NOT* issue STOP.
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*/
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scllo(adap);
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}
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sdahi(adap); //---
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//sdalo(adap); //+++
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if (sclhi(adap) < 0) { /* timeout */
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TRACE_DEBUG("i2c_outb: 0x%02x, timeout at ack\n", (int)c);
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return -ETIMEDOUT;
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}
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/* read ack: SDA should be pulled down by slave, or it may
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* NAK (usually to report problems with the data we wrote).
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*/
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ack = !getsda(adap); /* ack: sda is pulled low -> success */
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TRACE_DEBUG("i2c_outb: 0x%02x %s\n", (int)c, ack ? "A" : "NA");
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scllo(adap);
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//sdalo(adap); //+++
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return ack;
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/* assert: scl is low (sda undef) */
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}
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static int i2c_inb(struct i2c_adapter *i2c_adap)
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{
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/* read byte via i2c port, without start/stop sequence */
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/* acknowledge is sent in i2c_read. */
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int i;
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unsigned char indata = 0;
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
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/* assert: scl is low */
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sdahi(adap); //---
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for (i = 0; i < 8; i++) {
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if (sclhi(adap) < 0) { /* timeout */
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TRACE_DEBUG("i2c_inb: timeout at bit #%d\n", 7 - i);
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return -ETIMEDOUT;
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}
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indata *= 2;
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if (getsda(adap))
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indata |= 0x01;
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setscl(adap, 0);
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udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
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}
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/* assert: scl is low */
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return indata;
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}
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/* try_address tries to contact a chip for a number of
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* times before it gives up.
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* return values:
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* 1 chip answered
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* 0 chip did not answer
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* -x transmission error
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*/
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static int try_address(struct i2c_adapter *i2c_adap,
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unsigned char addr, int retries)
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{
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
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int i, ret = 0;
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for (i = 0; i <= retries; i++) {
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ret = i2c_outb(i2c_adap, addr);
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if (ret == 1 || i == retries)
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break;
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TRACE_DEBUG("emitting stop condition\n");
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i2c_stop(adap);
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udelay(adap->udelay);
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taskYIELD();
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TRACE_DEBUG("emitting start condition\n");
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i2c_start(adap);
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}
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if (i && ret)
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TRACE_DEBUG("Used %d tries to %s client at "
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"0x%02x: %s\n", i + 1,
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addr & 1 ? "read from" : "write to", addr >> 1,
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ret == 1 ? "success" : "failed, timeout?");
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return ret;
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}
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static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
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{
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const unsigned char *temp = msg->buf;
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int count = msg->len;
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unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
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int retval;
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int wrcount = 0;
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while (count > 0) {
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retval = i2c_outb(i2c_adap, *temp);
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/* OK/ACK; or ignored NAK */
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if ((retval > 0) || (nak_ok && (retval == 0))) {
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count--;
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temp++;
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wrcount++;
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/* A slave NAKing the master means the slave didn't like
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* something about the data it saw. For example, maybe
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* the SMBus PEC was wrong.
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*/
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} else if (retval == 0) {
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TRACE_ERROR("sendbytes: NAK bailout.\n");
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return -EIO;
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/* Timeout; or (someday) lost arbitration
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*
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* FIXME Lost ARB implies retrying the transaction from
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* the first message, after the "winning" master issues
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* its STOP. As a rule, upper layer code has no reason
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* to know or care about this ... it is *NOT* an error.
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*/
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} else {
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TRACE_ERROR("sendbytes: error %d\n", retval);
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return retval;
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}
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}
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return wrcount;
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}
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static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
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{
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
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/* assert: sda is high */
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if (is_ack) /* send ack */
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setsda(adap, 0);
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udelay((adap->udelay + 1) / 2);
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if (sclhi(adap) < 0) { /* timeout */
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TRACE_ERROR("readbytes: ack/nak timeout\n");
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return -ETIMEDOUT;
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}
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scllo(adap);
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return 0;
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}
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static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
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{
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int inval;
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int rdcount = 0; /* counts bytes read */
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unsigned char *temp = msg->buf;
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int count = msg->len;
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const unsigned flags = msg->flags;
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while (count > 0) {
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inval = i2c_inb(i2c_adap);
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if (inval >= 0) {
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*temp = inval;
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rdcount++;
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} else { /* read timed out */
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break;
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}
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temp++;
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count--;
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/* Some SMBus transactions require that we receive the
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transaction length as the first read byte. */
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if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
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if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
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if (!(flags & I2C_M_NO_RD_ACK))
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acknak(i2c_adap, 0);
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TRACE_ERROR("readbytes: invalid block length (%d)\n", inval);
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return -EPROTO;
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}
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/* The original count value accounts for the extra
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bytes, that is, either 1 for a regular transaction,
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or 2 for a PEC transaction. */
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count += inval;
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msg->len += inval;
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}
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TRACE_DEBUG( "readbytes: 0x%02x %s\n",
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inval,
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(flags & I2C_M_NO_RD_ACK)
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? "(no ack/nak)"
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: (count ? "A" : "NA"));
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if (!(flags & I2C_M_NO_RD_ACK)) {
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inval = acknak(i2c_adap, count);
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if (inval < 0)
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return inval;
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}
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}
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return rdcount;
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}
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/* doAddress initiates the transfer by generating the start condition (in
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* try_address) and transmits the address in the necessary format to handle
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* reads, writes as well as 10bit-addresses.
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* returns:
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* 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
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* -x an error occurred (like: -ENXIO if the device did not answer, or
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* -ETIMEDOUT, for example if the lines are stuck...)
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*/
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static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
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{
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unsigned short flags = msg->flags;
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unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
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unsigned char addr;
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int ret, retries;
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retries = nak_ok ? 0 : i2c_adap->retries;
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if (flags & I2C_M_TEN) {
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/* a ten bit address */
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addr = 0xf0 | ((msg->addr >> 7) & 0x06);
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TRACE_DEBUG("addr0: %d\n", addr);
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/* try extended address code...*/
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ret = try_address(i2c_adap, addr, retries);
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if ((ret != 1) && !nak_ok) {
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TRACE_ERROR("died at extended address code\n");
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return -ENXIO;
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}
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/* the remaining 8 bit address */
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ret = i2c_outb(i2c_adap, msg->addr & 0xff);
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if ((ret != 1) && !nak_ok) {
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/* the chip did not ack / xmission error occurred */
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TRACE_ERROR("died at 2nd address code\n");
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return -ENXIO;
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}
|
||
|
if (flags & I2C_M_RD) {
|
||
|
TRACE_DEBUG("emitting repeated start condition\n");
|
||
|
i2c_repstart(adap);
|
||
|
/* okay, now switch into reading mode */
|
||
|
addr |= 0x01;
|
||
|
ret = try_address(i2c_adap, addr, retries);
|
||
|
if ((ret != 1) && !nak_ok) {
|
||
|
TRACE_ERROR("died at repeated address code\n");
|
||
|
return -EIO;
|
||
|
}
|
||
|
}
|
||
|
} else { /* normal 7bit address */
|
||
|
addr = msg->addr << 1;
|
||
|
if (flags & I2C_M_RD)
|
||
|
addr |= 1;
|
||
|
if (flags & I2C_M_REV_DIR_ADDR)
|
||
|
addr ^= 1;
|
||
|
ret = try_address(i2c_adap, addr, retries);
|
||
|
if ((ret != 1) && !nak_ok)
|
||
|
return -ENXIO;
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int bit_xfer(struct i2c_adapter *i2c_adap,
|
||
|
struct i2c_msg msgs[], int num)
|
||
|
{
|
||
|
struct i2c_msg *pmsg;
|
||
|
struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
|
||
|
int i, ret;
|
||
|
unsigned short nak_ok;
|
||
|
|
||
|
TRACE_DEBUG("emitting start condition\n");
|
||
|
i2c_start(adap);
|
||
|
for (i = 0; i < num; i++) {
|
||
|
pmsg = &msgs[i];
|
||
|
nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
|
||
|
if (!(pmsg->flags & I2C_M_NOSTART)) {
|
||
|
if (i) {
|
||
|
if (msgs[i - 1].flags & I2C_M_STOP) {
|
||
|
TRACE_DEBUG("emitting enforced stop/start condition\n");
|
||
|
i2c_stop(adap);
|
||
|
i2c_start(adap);
|
||
|
} else {
|
||
|
TRACE_DEBUG("emitting repeated start condition\n");
|
||
|
i2c_repstart(adap);
|
||
|
}
|
||
|
}
|
||
|
ret = bit_doAddress(i2c_adap, pmsg);
|
||
|
if ((ret != 0) && !nak_ok) {
|
||
|
TRACE_DEBUG("NAK from device addr 0x%02x msg #%d\n", msgs[i].addr, i);
|
||
|
goto bailout;
|
||
|
}
|
||
|
}
|
||
|
if (pmsg->flags & I2C_M_RD) {
|
||
|
/* read bytes into buffer*/
|
||
|
ret = readbytes(i2c_adap, pmsg);
|
||
|
if (ret >= 1)
|
||
|
TRACE_DEBUG("read %d byte%s\n", ret, ret == 1 ? "" : "s");
|
||
|
if (ret < pmsg->len) {
|
||
|
if (ret >= 0)
|
||
|
ret = -EIO;
|
||
|
goto bailout;
|
||
|
}
|
||
|
} else {
|
||
|
/* write bytes from buffer */
|
||
|
ret = sendbytes(i2c_adap, pmsg);
|
||
|
if (ret >= 1)
|
||
|
TRACE_DEBUG("wrote %d byte%s\n", ret, ret == 1 ? "" : "s");
|
||
|
if (ret < pmsg->len) {
|
||
|
if (ret >= 0)
|
||
|
ret = -EIO;
|
||
|
goto bailout;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
ret = i;
|
||
|
|
||
|
bailout:
|
||
|
TRACE_DEBUG("emitting stop condition\n");
|
||
|
i2c_stop(adap);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
struct i2c_gpio_platform_data i2c_gpio[] = {
|
||
|
{
|
||
|
.devid = 0,
|
||
|
.sda_pin = I2C_GPIO0_SDA_PIN,
|
||
|
.scl_pin = I2C_GPIO0_SCL_PIN,
|
||
|
.udelay = 5, /* clk freq 500/udelay kHz */
|
||
|
.timeout = configTICK_RATE_HZ / 10, /* 100ms */
|
||
|
.sda_is_open_drain = 0,
|
||
|
.scl_is_open_drain = 0,
|
||
|
.scl_is_output_only = 1,
|
||
|
}
|
||
|
};
|
||
|
|
||
|
const struct i2c_algorithm i2c_bit_algo = {
|
||
|
.master_xfer = bit_xfer,
|
||
|
};
|
||
|
|
||
|
int i2c_bit_add_bus(struct i2c_adapter *adap)
|
||
|
{
|
||
|
int ret;
|
||
|
|
||
|
/* register new adapter to i2c module... */
|
||
|
adap->algo = &i2c_bit_algo;
|
||
|
adap->retries = 3;
|
||
|
|
||
|
ret = i2c_add_adapter(adap);
|
||
|
if (ret < 0)
|
||
|
return ret;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int i2c_gpio_add_device(struct i2c_gpio_platform_data *pdevdata)
|
||
|
{
|
||
|
struct i2c_gpio_private_data *priv;
|
||
|
struct i2c_gpio_platform_data *pdata;
|
||
|
struct i2c_algo_bit_data *bit_data;
|
||
|
struct i2c_adapter *adap;
|
||
|
int ret;
|
||
|
|
||
|
priv = pvPortMalloc(sizeof(*priv));
|
||
|
if (!priv) {
|
||
|
TRACE_ERROR("[%s] pvPortMalloc failed, devid:%d\n", __func__, pdevdata->devid);
|
||
|
return -ENOMEM;
|
||
|
}
|
||
|
memset(priv, 0, sizeof(*priv));
|
||
|
|
||
|
adap = &priv->adap;
|
||
|
bit_data = &priv->bit_data;
|
||
|
pdata = &priv->pdata;
|
||
|
|
||
|
memcpy(pdata, pdevdata, sizeof(*pdata));
|
||
|
gpio_request(pdata->sda_pin);
|
||
|
gpio_request(pdata->scl_pin);
|
||
|
|
||
|
if (pdata->sda_is_open_drain) {
|
||
|
gpio_direction_output(pdata->sda_pin, 1);
|
||
|
bit_data->setsda = i2c_gpio_setsda_val;
|
||
|
} else {
|
||
|
gpio_direction_input(pdata->sda_pin);
|
||
|
bit_data->setsda = i2c_gpio_setsda_dir;
|
||
|
}
|
||
|
|
||
|
if (pdata->scl_is_open_drain || pdata->scl_is_output_only) {
|
||
|
gpio_direction_output(pdata->scl_pin, 1);
|
||
|
bit_data->setscl = i2c_gpio_setscl_val;
|
||
|
} else {
|
||
|
gpio_direction_input(pdata->scl_pin);
|
||
|
bit_data->setscl = i2c_gpio_setscl_dir;
|
||
|
}
|
||
|
|
||
|
if (!pdata->scl_is_output_only)
|
||
|
bit_data->getscl = i2c_gpio_getscl;
|
||
|
bit_data->getsda = i2c_gpio_getsda;
|
||
|
|
||
|
if (pdata->udelay)
|
||
|
bit_data->udelay = pdata->udelay;
|
||
|
else if (pdata->scl_is_output_only)
|
||
|
bit_data->udelay = 50; /* 10 kHz */
|
||
|
else
|
||
|
bit_data->udelay = 5; /* 100 kHz */
|
||
|
|
||
|
if (pdata->timeout)
|
||
|
bit_data->timeout = pdata->timeout;
|
||
|
else
|
||
|
bit_data->timeout = configTICK_RATE_HZ / 10; /* 100 ms */
|
||
|
|
||
|
bit_data->data = pdata;
|
||
|
|
||
|
snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdata->devid);
|
||
|
|
||
|
adap->algo_data = bit_data;
|
||
|
|
||
|
ret = i2c_bit_add_bus(adap);
|
||
|
if (ret) {
|
||
|
TRACE_ERROR("[%s] i2c_bit_add_bus failed, devid:%d\n", __func__, pdata->devid);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
TRACE_INFO("using pins %u (SDA) and %u (SCL%s)\n",
|
||
|
pdata->sda_pin, pdata->scl_pin,
|
||
|
pdata->scl_is_output_only
|
||
|
? ", no clock stretching" : "");
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
void i2c_gpio_init(void)
|
||
|
{
|
||
|
int i;
|
||
|
|
||
|
for(i=0; i<sizeof(i2c_gpio)/sizeof(i2c_gpio[0]); i++) {
|
||
|
i2c_gpio_add_device(&i2c_gpio[i]);
|
||
|
}
|
||
|
}
|
||
|
#endif
|