114 lines
4.8 KiB
C
114 lines
4.8 KiB
C
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#ifndef __AMT630HV100__H
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#define __AMT630HV100__H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#include <stdint.h>
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#ifdef __cplusplus
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#define __I volatile /**< Defines 'read-only' permissions */
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#else
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#define __I volatile const /**< Defines 'read-only' permissions */
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#endif
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#define __O volatile /**< Defines 'write-only' permissions */
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#define __IO volatile /**< Defines 'read/write' permissions */
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#endif
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#include "os_adapt.h"
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typedef enum IRQn
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{
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LCD_IRQn = 0, /**< 0 AMT630HV100 LCD Interrupt ID */
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JPG_IRQn = 1, /**< 1 AMT630HV100 Jpeg Decoder Interrupt (JPG) */
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GPU_IRQn = 2, /**< 2 AMT630HV100 GPU Interrupt (GPU) */
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USB_IRQn = 3, /**< 3 AMT630HV100 USB Controller Interrupt (USB) */
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PXP_IRQn = 4, /**< 4 AMT630HV100 PXP Interrupt (PXP) */
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DMA_IRQn = 5, /**< 5 AMT630HV100 DMA Controller Interrupt (DMAC) */
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SDMMC0_IRQn = 6, /**< 6 AMT630HV100 SDMMC 0 Controller Interrupt (SDMMC0) */
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SPI0_IRQn = 7, /**< 7 AMT630HV100 SPI 0 Controller Interrupt (SPI0) */
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SPI1_IRQn = 8, /**< 8 AMT630HV100 SPI 1 Controller Interrupt (SPI1) */
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I2C0_IRQn = 9, /**< 9 AMT630HV100 I2C0 Controller Interrupt (I2C0) */
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I2C1_IRQn = 10, /**< 10 AMT630HV100 I2C1 Controller Interrupt (I2C1) */
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UART0_IRQn = 11, /**< 11 AMT630HV100 UART 0 Controller Interrupt (UART0) */
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UART1_IRQn = 12, /**< 12 AMT630HV100 UART 1 Controller Interrupt (UART1) */
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UART2_IRQn = 13, /**< 13 AMT630HV100 UART 2 Controller Interrupt (UART2) */
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UART3_IRQn = 14, /**< 14 AMT630HV100 UART 3 Controller Interrupt (UART3) */
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GPIOA_IRQn = 15, /**< 15 AMT630HV100 GPIO0~31 Controller Interrupt (GPIOA) */
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GPIOB_IRQn = 16, /**< 16 AMT630HV100 GPIO32~63 Controller Interrupt (GPIOB) */
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GPIOC_IRQn = 17, /**< 17 AMT630HV100 GPIO64~95 Controller Interrupt (GPIOC) */
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GPIOD_IRQn = 18, /**< 18 AMT630HV100 GPIO96~127 Controller Interrupt (GPIOD) */
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TIMER0_IRQn = 19, /**< 19 AMT630HV100 Timer 0 Interrupt (TIMER0) */
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TIMER1_IRQn = 20, /**< 20 AMT630HV100 Timer 1 Interrupt (TIMER1) */
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TIMER2_IRQn = 21, /**< 21 AMT630HV100 Timer 2/3 Interrupt (TIMER2/TIMER3) */
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I2S1_IRQn = 22, /**< 22 AMT630HV100 I2S1 Interrupt (I2S1) */
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ITU_IRQn = 23, /**< 23 AMT630HV100 ITU Controller Interrupt (ITU) */
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WDT_IRQn = 24, /**< 24 AMT630HV100 Watchdog timer Interrupt (WDT) */
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I2S_IRQn = 25, /**< 25 AMT630HV100 I2S Interrupt (I2S) */
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BLEND2D_IRQn = 26, /**< 26 AMT630HV100 BLEND2D Interrupt (BLEND2D) */
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RTC_PRD_IRQn = 27, /**< 27 AMT630HV100 RTC Controller Period Interrupt (RTCP) */
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ADC_IRQn = 28, /**< 28 AMT630HV100 ADC controller Interrupt (ADC) */
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RCRT_IRQn = 29, /**< 29 */
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CAN0_IRQn = 30, /**< 30 AMT630HV100 CAN0 Controller Interrupt (CAN0) */
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CAN1_IRQn = 31, /**< 31 AMT630HV100 CAN1 Controller Interrupt (CAN1) */
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MAX_IRQ_NUM = 32 /**< Number of peripheral IDs */
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} IRQn_Type;
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/*@}*/
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/* ************************************************************************** */
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/* BASE ADDRESS DEFINITIONS FOR AMT630HV100 */
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/* ************************************************************************** */
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/** \addtogroup AMT630HV100_base Peripheral Base Address Definitions */
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/*@{*/
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#define REGS_SYSCTL_BASE (0x60000000U)
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#define REGS_SPI0_BASE (0x60100000U)
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#define REGS_SPI1_BASE (0x60200000U)
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#define REGS_IIC0_BASE (0x60300000U)
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#define REGS_IIC1_BASE (0x60400000U)
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#define REGS_UART0_BASE (0x60500000U)
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#define REGS_UART1_BASE (0x60600000U)
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#define REGS_UART2_BASE (0x60700000U)
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#define REGS_UART3_BASE (0x60800000U)
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#define REGS_GPIO_BASE (0x60900000U)
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#define REGS_TIMER_BASE (0x60a00000U)
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#define REGS_PWM_BASE (0x60b00000U)
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#define REGS_WDT_BASE (0x60c00000U)
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#define REGS_I2S_BASE (0x60d00000U)
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#define REGS_I2S1_BASE (0x60f00000U)
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#define REGS_MIPI_BASE (0x60e00000U)
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#define REGS_RTC_BASE (0x61000000U)
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#define REGS_ADC_BASE (0x61100000U)
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#define REGS_RCRT_BASE (0x61200000U)
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#define REGS_AES_BASE (0x61300000U)
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#define REGS_AIC_BASE (0x61400000U)
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#define REGS_CAN0_BASE (0x61500000U)
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#define REGS_CAN1_BASE (0x61600000U)
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#define REGS_DMAC_BASE (0x70100000U)
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#define REGS_GPU_BASE (0x70200000U)
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#define REGS_USB_BASE (0x70300000U)
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#define REGS_SDMMC0_BASE (0X70400000U)
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#define REGS_ITU_BASE (0X70600000U)
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#define REGS_BLEND2D_BASE (0x70700000U)
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#define REGS_LCD_BASE (0X71000000U)
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#define REGS_PXP_BASE (0X71100000U)
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#define REGS_ROTATE_BASE (0X71207000U)
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#define REGS_JPG_BASE (0X71208000U)
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#define REGS_DDRC_BASE (0X71300000U)
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/* ************************************************************************** */
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/* ELECTRICAL DEFINITIONS FOR AMT630HV100 */
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/* ************************************************************************** */
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#ifdef __cplusplus
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}
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#endif
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/*@}*/
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#endif /* __AMT630HV100__H */
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