#include "amt630h.h" #include "pinctrl.h" #include "sysctl.h" #define PINCTL_REG_BASE REGS_SYSCTL_BASE /* typedef struct { } xPinFunction_t; */ typedef struct { int reg; int offset; int mask; } xPinmap_t; static xPinmap_t amt630h_pin_map[] = { {0xc0, 0, 0x3}, {0xc0, 2, 0x3}, {0xc0, 4, 0x3}, {0xc0, 6, 0x3}, {0xc0, 8, 0x3}, {0xc0, 10, 0x3}, {0xc0, 12, 0x3}, {0xc0, 14, 0x3}, {0xc0, 16, 0x3}, {0xc0, 18, 0x3}, {0xc0, 20, 0x3}, {0xc0, 22, 0x3}, {0xc0, 24, 0x3}, {0xc0, 26, 0x3}, {0xc0, 28, 0x3}, {0xc0, 30, 0x3}, {0xc4, 0, 0x3}, {0xc4, 2, 0x3}, {0xc4, 4, 0x3}, {0xc4, 6, 0x3}, {0xc4, 8, 0x3}, {0xc4, 10, 0x3}, {0xc4, 12, 0x3}, {0xc4, 14, 0x3}, {0xc4, 16, 0x3}, {0xc4, 18, 0x3}, {0xc4, 20, 0x3}, {0xc4, 22, 0x3}, {0xc4, 24, 0x3}, {0xc4, 26, 0x3}, {0xc4, 28, 0x3}, {0xc4, 30, 0x3}, {0xc8, 0, 0x3}, {0xc8, 2, 0x3}, {0xc8, 4, 0x3}, {0xc8, 6, 0x3}, {0xc8, 8, 0x3}, {0xc8, 10, 0x3}, {0xc8, 12, 0x3}, {0xc8, 14, 0x3}, {0xc8, 16, 0x3}, {0xc8, 18, 0x3}, {0xc8, 20, 0x3}, {0xc8, 22, 0x3}, {0xc8, 24, 0x3}, {0xc8, 26, 0x3}, {0xc8, 28, 0x3}, {0xc8, 30, 0x3}, {0xcc, 0, 0x3}, {0xcc, 2, 0x3}, {0xcc, 4, 0x3}, {0xcc, 6, 0x3}, {0xcc, 8, 0x3}, {0xcc, 10, 0x3}, {0xcc, 12, 0x3}, {0xcc, 14, 0x3}, {0xcc, 16, 0x3}, {0xcc, 18, 0x3}, {0xcc, 20, 0x3}, {0xcc, 22, 0x3}, {0xcc, 24, 0x3}, {0xcc, 26, 0x3}, {0xcc, 28, 0x3}, {0xcc, 30, 0x3}, {0xd0, 0, 0x3}, {0xd0, 2, 0x3}, {0xd0, 4, 0x3}, {0xd0, 6, 0x3}, {0xd0, 8, 0x3}, {0xd0, 10, 0x3}, {0xd0, 12, 0x3}, {0xd0, 14, 0x3}, {0xd0, 16, 0x3}, {0xd0, 18, 0x3}, {0xd0, 20, 0x3}, {0xd0, 22, 0x3}, {0xd0, 24, 0x3}, {0xd0, 26, 0x3}, {0xd0, 28, 0x3}, {0xd0, 30, 0x3}, {0xd4, 0, 0x3}, {0xd4, 2, 0x3}, {0xd4, 4, 0x3}, {0xd4, 6, 0x3}, {0xd4, 8, 0x3}, {0xd4, 10, 0x3}, {0xd4, 12, 0x3}, {0xd4, 14, 0x3}, {0xd4, 16, 0x3}, {0xd4, 18, 0x3}, {0xd4, 20, 0x3}, {0xd4, 22, 0x3}, {0xd4, 24, 0x3}, {0xd4, 26, 0x3}, {0xd4, 28, 0x3}, {0xd4, 30, 0x3}, {0xd8, 4, 0x3}, {0xd8, 0, 0x3}, {0xd8, 6, 0x3}, {0xd8, 2, 0x3}, {0xd8, 8, 0x3}, {0xd8, 10, 0x3}, /* pad not mux with gpio */ }; static void pinctrl_set_pin(int npin, int val, int drive) { xPinmap_t *pctrl; uint32_t reg; pctrl = &amt630h_pin_map[npin]; reg = readl(PINCTL_REG_BASE + pctrl->reg); reg &= ~(pctrl->mask << pctrl->offset); reg |= val << pctrl->offset; writel(reg, PINCTL_REG_BASE + pctrl->reg); if (drive != PAD_DRIVE_DEFAULT) { uint32_t drv_reg = SYS_IO_DRIVER00 + npin / 16 * 4; uint32_t offset = (npin % 16) * 2; uint32_t drv_val = drive - 1; vSysctlConfigure(drv_reg, offset, 3, drv_val); } } void pinctrl_gpio_request(int gpio) { pinctrl_set_pin(gpio, 0, PAD_DRIVE_DEFAULT); }