70 lines
2.0 KiB
C
70 lines
2.0 KiB
C
#include "basetype.h"
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#include "dwl.h"
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//#define _DWL_DEBUG
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#ifdef _DWL_DEBUG
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#define DWL_DEBUG(fmt, args...) printf(__FILE__ ":%d: " fmt, __LINE__ , ## args)
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#else
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#define DWL_DEBUG(fmt, args...) /* not debugging: nothing */
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#endif
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#ifndef HX170DEC_IO_BASE
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#define HX170DEC_IO_BASE 0xC0000000U
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#endif
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#define HX170PP_REG_START 0xF0
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#define HX170DEC_REG_START 0x4
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#define HX170PP_SYNTH_CFG 100
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#define HX170DEC_SYNTH_CFG 50
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#define HX170DEC_SYNTH_CFG_2 54
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#define HX170PP_FUSE_CFG 99
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#define HX170DEC_FUSE_CFG 57
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#define DWL_DECODER_INT ((DWLReadReg(dec_dwl, HX170DEC_REG_START) >> 12) & 0xFFU)
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#define DWL_PP_INT ((DWLReadReg(dec_dwl, HX170PP_REG_START) >> 12) & 0xFFU)
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#define DEC_IRQ_ABORT (1 << 11)
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#define DEC_IRQ_RDY (1 << 12)
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#define DEC_IRQ_BUS (1 << 13)
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#define DEC_IRQ_BUFFER (1 << 14)
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#define DEC_IRQ_ASO (1 << 15)
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#define DEC_IRQ_ERROR (1 << 16)
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#define DEC_IRQ_SLICE (1 << 17)
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#define DEC_IRQ_TIMEOUT (1 << 18)
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#define PP_IRQ_RDY (1 << 12)
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#define PP_IRQ_BUS (1 << 13)
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#define DWL_STREAM_ERROR_BIT 0x010000 /* 16th bit */
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#define DWL_HW_TIMEOUT_BIT 0x040000 /* 18th bit */
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#define DWL_HW_ENABLE_BIT 0x000001 /* 0th bit */
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#define DWL_HW_PIC_RDY_BIT 0x001000 /* 12th bit */
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#ifdef _DWL_HW_PERFORMANCE
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/* signal that decoder/pp is enabled */
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void DwlDecoderEnable(void);
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void DwlPpEnable(void);
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#endif
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/* Function prototypes */
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/* wrapper information */
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typedef struct hX170dwl
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{
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u32 clientType;
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u32 numCores;
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volatile u32 *pRegBase; /* IO mem base */
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u32 regSize; /* IO mem size */
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u32 freeLinMem; /* Start address of free linear memory */
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u32 freeRefFrmMem; /* Start address of free reference frame memory */
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int semid;
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int sigio_needed;
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u32 bPPReserved;
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} hX170dwl_t;
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i32 DWLWaitPpHwReady(const void *instance, u32 timeout);
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i32 DWLWaitDecHwReady(const void *instance, u32 timeout);
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void DWLSoftResetAsic(void);
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