125 lines
2.5 KiB
C
125 lines
2.5 KiB
C
#include "amt630h.h"
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static void delay(volatile int count )
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{
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while(count--);
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}
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void SetCpuPLL(unsigned int freq_mhz)
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{
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rSYS_CPUPLL_CFG &= ~(1<<14);
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delay(10);
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rSYS_BUS_CLK1_SEL |= (1<< 0);
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rSYS_CPUPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
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}
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void SetSysPLL(unsigned int freq_mhz)
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{
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rSYS_SYSPLL_CFG &= ~(1<<14);
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delay(10);
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rSYS_BUS_CLK1_SEL |= (1<< 1);
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rSYS_SYSPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
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}
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void SetDDRPLL(unsigned int freq_mhz)
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{
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rSYS_DDRPLL_CFG &= ~(1<<14);
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delay(10);
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rSYS_BUS_CLK1_SEL |= (1<< 2);
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// rSYS_DDRPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
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rSYS_DDRPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<15);
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// rSYS_DDRPLL_CFG = (freq_mhz/12)|(0x0C<<8)|(1<<14)|(1<<15);
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delay(100);
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rSYS_DDRPLL_CFG |= (1<< 14);
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}
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void SetVPUPLL(unsigned int freq_mhz)
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{
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rSYS_VPUPLL_CFG &= ~(1<<14);
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delay(10);
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rSYS_BUS_CLK1_SEL |= (1<< 3);
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rSYS_VPUPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
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}
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void SetXclkAHBclkAPBclk(void)
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{
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unsigned int val;
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unsigned int hclk2x_div;
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unsigned int apbclk_div;
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unsigned int main_hclk_sel;
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unsigned int main_hclk2x_sel;
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unsigned int cpuclk_div;
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unsigned int main_cpuclk_sel;
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unsigned int ddrclk2x_div;
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unsigned int main_ddrclk2x_sel;
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main_cpuclk_sel = 1;
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cpuclk_div = 0;
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main_hclk2x_sel = 1;
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hclk2x_div = 0;
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main_hclk_sel = 1;
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apbclk_div = 1;
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ddrclk2x_div = 0;
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main_ddrclk2x_sel = 1;
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#if 0
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val = rSYS_BUS_CLK_SEL;
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val &=~(0xFFFFFFFF);
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val |= (main_cpuclk_sel<< 0) |(cpuclk_div << 2) | (main_hclk2x_sel << 8) | (hclk2x_div << 7) | (main_hclk_sel << 11) | (apbclk_div << 16);
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rSYS_BUS_CLK_SEL = val;
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#endif
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val = rSYS_BUS_CLK_SEL;
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val &=~(0xFFFFFFFF);
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val |= (main_cpuclk_sel<< 0) |(cpuclk_div << 2);
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rSYS_BUS_CLK_SEL = val;
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delay(2000);
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val = rSYS_BUS_CLK_SEL;
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val |= (main_hclk2x_sel << 8) | (hclk2x_div << 10) | (main_hclk_sel << 15) | (apbclk_div << 16) | (main_ddrclk2x_sel << 24) | (ddrclk2x_div << 26);
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rSYS_BUS_CLK_SEL = val;
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delay(2000);
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}
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void SetSpiclk(void)
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{
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unsigned int val;
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val = rSYS_SSP_CLK_CFG;
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val &=~(0x1F);
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val |= (1<< 4) |(4 << 0);
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rSYS_SSP_CLK_CFG = val;
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}
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void SetGpuclk(void)
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{
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unsigned int val;
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val = rSYS_TIMER1_CLK_CFG;
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val &=~(0xfF);
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val |= (0<< 3) |(1<< 0); //00:syspll_clk, 01:cpupll_clk
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rSYS_TIMER1_CLK_CFG = val;
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}
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void SetMfcclk(void)
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{
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unsigned int val;
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val = rSYS_TIMER_CLK_CFG;
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val &=~(0xfF<<8);
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val |= (0x00<< 11) |(0x1<< 8);
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rSYS_TIMER_CLK_CFG = val;
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}
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void SwitchTo24MHz(void)
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{
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rSYS_BUS_CLK_SEL = 0;
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delay(10);
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}
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