239 lines
6.8 KiB
C
239 lines
6.8 KiB
C
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#include "driver_display.h"
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static void reg_write(uint8_t addr, uint8_t *value, uint8_t length)
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{
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uint8_t sdat[length + 4];
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sdat[0] = 0x02;
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sdat[1] = 0x00;
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sdat[2] = addr;
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sdat[3] = 0x00;
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memcpy(&sdat[4], value, length);
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__DISPLAY_CS_CLEAR();
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spi_master_transmit_X1(&spi_display_handle, sdat, sizeof(sdat));
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__DISPLAY_CS_SET();
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}
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static void reg_read(uint8_t addr, uint8_t *value, uint8_t length)
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{
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uint8_t sdat[4];
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sdat[0] = 0x03;
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sdat[1] = 0x00;
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sdat[2] = addr;
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sdat[3] = 0x00;
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__DISPLAY_CS_CLEAR();
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spi_master_transmit_X1(&spi_display_handle, sdat, sizeof(sdat));
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spi_master_receive_X1(&spi_display_handle, value, length);
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__DISPLAY_CS_SET();
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}
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void icna3310_init(void)
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{
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uint8_t buffer[4];
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__DISPLAY_VCI_CLEAR();
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__DISPLAY_RESET_CLEAR();
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__DISPLAY_DELAY_MS(200);
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__DISPLAY_VCI_SET();
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__DISPLAY_DELAY_MS(50);
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__DISPLAY_RESET_SET();
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__DISPLAY_DELAY_MS(5);
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__DISPLAY_RESET_CLEAR();
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__DISPLAY_DELAY_MS(5);
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__DISPLAY_RESET_SET();
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__DISPLAY_DELAY_MS(5);
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// __DISPLAY_VCI_CLEAR();
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// __DISPLAY_RESET_CLEAR();
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// __DISPLAY_DELAY_MS(20);
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// __DISPLAY_RESET_SET();
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// __DISPLAY_DELAY_MS(40);
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// __DISPLAY_VCI_SET();
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// __DISPLAY_DELAY_MS(80);
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buffer[0] = 0x20;
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reg_write(0xFE, &buffer[0], 1);
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buffer[0] = 0x5a;
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reg_write(0xF4, &buffer[0], 1);
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buffer[0] = 0x59;
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reg_write(0xF5, &buffer[0], 1);
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buffer[0] = 0x40;
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reg_write(0xFE, &buffer[0], 1);
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buffer[0] = 0x0a;
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reg_write(0x08, &buffer[0], 1);
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buffer[0] = 0x00;
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reg_write(0xFE, &buffer[0], 1);
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buffer[0] = 0x80;
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reg_write(0xC4, &buffer[0], 1);//SPI sram write enable
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buffer[0] = 0x55;
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reg_write(0x3A, &buffer[0], 1);//55 RGB565, 77 RGB888
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buffer[0] = 0x00;
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reg_write(0x35, &buffer[0], 1);
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buffer[0] = 0x20;
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reg_write(0x53, &buffer[0], 1);
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buffer[0] = 0xFF;
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reg_write(0x51, &buffer[0], 1);
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buffer[0] = 0xFF;
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reg_write(0x63, &buffer[0], 1);
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buffer[0] = 0x00;
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buffer[1] = 0x06;
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buffer[2] = 0x01;
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buffer[3] = 0xD7;
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reg_write(0x2A, &buffer[0], 4); // paritial update:466RGB
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buffer[0] = 0x00;
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buffer[1] = 0x00;
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buffer[2] = 0x01;
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buffer[3] = 0xD1;
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reg_write(0x2B, &buffer[0], 4); // partial update:466line
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// buffer[0] = 0x00;
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// reg_write(0xFE, &buffer[0], 1);
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reg_write(0x11, NULL, 0);
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__DISPLAY_DELAY_MS(120);
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// buffer[0] = 0x00;
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// reg_write(0xFE, &buffer[0], 1);
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reg_write(0x29, NULL, 0);
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__DISPLAY_DELAY_MS(50);
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}
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void icna3310_set_window(uint16_t x_s, uint16_t x_e, uint16_t y_s, uint16_t y_e)
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{
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uint8_t data[4];
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x_s += 6;
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x_e += 6;
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data[0] = x_s >> 8;
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data[1] = x_s & 0xff;
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data[2] = x_e >> 8;
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data[3] = x_e & 0xff;
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reg_write(0x2A, &data[0], 4);
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data[0] = y_s >> 8;
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data[1] = y_s & 0xff;
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data[2] = y_e >> 8;
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data[3] = y_e & 0xff;
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reg_write(0x2B, &data[0], 4);
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// reg_write(0x2C, &data[0], 4);
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}
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void icna3310_adjust_brightness(uint8_t value) //Value 0x00 - 0xFF
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{
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uint8_t buffer[1];
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buffer[0] = 0x00;
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reg_write(0xFE, &buffer[0], 1);
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buffer[0] = value;
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reg_write(0x51, &buffer[0], 1);
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}
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void icna3310_display(uint32_t pixel_count, uint8_t pixel_width, void *data)
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{
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uint8_t frame_size;
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if (pixel_width == 16) {
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frame_size = SPI_FRAME_SIZE_16BIT;
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}
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else if (pixel_width == 32) {
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frame_size = SPI_FRAME_SIZE_24BIT;
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}
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spi_display_handle.Init.Frame_Size = frame_size;
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spi_display_handle.MultWireParam.Wire_X2X4X8 = Wire_X4;
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spi_display_handle.MultWireParam.InstructLength = INST_8BIT;
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spi_display_handle.MultWireParam.Instruct = 0x32;
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spi_display_handle.MultWireParam.AddressLength = ADDR_24BIT;
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spi_display_handle.MultWireParam.Address = 0x002C00;
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__DISPLAY_CS_CLEAR();
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spi_master_transmit_X2X4X8(&spi_display_handle, data, pixel_count);
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__DISPLAY_CS_SET();
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__SPI_DISABLE(spi_display_handle.SPIx);
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__SPI_DATA_FRAME_SIZE(spi_display_handle.SPIx, SPI_FRAME_SIZE_8BIT);
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}
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void icna3310_display_dma(uint32_t pixel_count, uint8_t pixel_width, void *data)
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{
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uint8_t spi_trans_width;
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uint32_t dma_sample_count;
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switch (dma_display_handle.Init.Source_Width) {
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case DMA_TRANSFER_WIDTH_32:
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dma_sample_count = pixel_count * pixel_width / 32;
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break;
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case DMA_TRANSFER_WIDTH_16:
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dma_sample_count = pixel_count * pixel_width / 16;
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break;
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case DMA_TRANSFER_WIDTH_8:
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dma_sample_count = pixel_count * pixel_width / 8;
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break;
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default:
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return;
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}
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switch (dma_display_handle.Init.Desination_Width) {
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case DMA_TRANSFER_WIDTH_32:
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spi_trans_width = SPI_FRAME_SIZE_32BIT;
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break;
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case DMA_TRANSFER_WIDTH_16:
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spi_trans_width = SPI_FRAME_SIZE_16BIT;
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break;
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case DMA_TRANSFER_WIDTH_8:
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spi_trans_width = SPI_FRAME_SIZE_8BIT;
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break;
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default:
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return;
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}
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if (pixel_width != 32) {
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spi_display_handle.Init.Frame_Size = spi_trans_width;
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}
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else {
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spi_display_handle.Init.Frame_Size = SPI_FRAME_SIZE_24BIT;
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}
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spi_display_handle.MultWireParam.Wire_X2X4X8 = Wire_X4;
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spi_display_handle.MultWireParam.InstructLength = INST_8BIT;
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spi_display_handle.MultWireParam.Instruct = 0x32;
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spi_display_handle.MultWireParam.AddressLength = ADDR_24BIT;
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spi_display_handle.MultWireParam.Address = 0x002C00;
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__DISPLAY_CS_CLEAR();
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__SPI_DISABLE(spi_display_handle.SPIx);
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__SPI_TX_ENDIAN_SET(spi_display_handle.SPIx, TX_RX_Endian_4321);
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__SPI_ENABLE(spi_display_handle.SPIx);
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spi_master_transmit_X2X4X8_DMA(&spi_display_handle);
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__SPI_DISABLE(spi_display_handle.SPIx);
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if ((spi_trans_width == SPI_FRAME_SIZE_32BIT)
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&& (pixel_width != 32)) {
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__SPI_TX_ENDIAN_SET(spi_display_handle.SPIx, TX_RX_Endian_2143);
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}
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else {
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__SPI_TX_ENDIAN_SET(spi_display_handle.SPIx, TX_RX_Endian_4321);
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}
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__SPI_ENABLE(spi_display_handle.SPIx);
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dma_start_IT(&dma_display_handle, (uint32_t)data, (uint32_t)&spi_display_handle.SPIx->DR, dma_sample_count);
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}
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void icna3310_display_dma_isr(void)
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{
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while(__SPI_IS_BUSY(spi_display_handle.SPIx));
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// CS Release
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__DISPLAY_CS_SET();
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/* Clear Transfer complete status */
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dma_clear_tfr_Status(&dma_display_handle);
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/* channel Transfer complete interrupt disable */
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dma_tfr_interrupt_disable(&dma_display_handle);
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__SPI_DISABLE(spi_display_handle.SPIx);
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__SPI_DATA_FRAME_SIZE(spi_display_handle.SPIx, SPI_FRAME_SIZE_8BIT);
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__SPI_TX_ENDIAN_SET(spi_display_handle.SPIx, TX_RX_Endian_4321);
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}
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