80 lines
1.4 KiB
ArmAsm
80 lines
1.4 KiB
ArmAsm
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EXPORT low_power_save_cpu
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EXPORT low_power_restore_cpu
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IMPORT low_power_enter_sleep
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;ret
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;msp
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;psp
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;control
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;msplim
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;psplim
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low_power_store_size EQU 0x00000018
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AREA |.bss|, NOINIT, READWRITE, ALIGN=3
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low_power_store_addr
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low_power_store_buffer SPACE low_power_store_size
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AREA |ram_code|, CODE, READONLY, ALIGN=2
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PRESERVE8
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low_power_save_cpu
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push {r0-r12, lr}
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mrs r0, BASEPRI
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mrs r1, PRIMASK
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mrs r2, FAULTMASK
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mrs r3, CONTROL
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mrs r4, APSR
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mrs r5, EPSR
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mrs r6, IPSR
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push {r0-r6}
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ldr r1, =low_power_store_addr
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mrs r2, msp
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str r2, [r1]
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mrs r2, psp
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str r2, [r1, #4]
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mrs r2, CONTROL
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str r2, [r1, #8]
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ldr r2, =ret
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orr r2, r2, #1
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str r2, [r1, #12]
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mrs r2, msplim
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str r2, [r1, #16]
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mrs r2, psplim
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str r2, [r1, #20]
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bl low_power_enter_sleep
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b .
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ret
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ldr r1, =low_power_store_addr
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ldr r2, [r1]
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msr msp, r2
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ldr r2, [r1, #4]
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msr psp, r2
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ldr r2, [r1, #8]
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msr CONTROL, r2
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ldr r2, [r1, #16]
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msr msplim, r2
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ldr r2, [r1, #20]
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msr psplim, r2
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pop {r0-r6}
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msr BASEPRI, r0
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msr PRIMASK, r1
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msr FAULTMASK, r2
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msr CONTROL, r3
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msr APSR_nzcvq, r4
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msr EPSR, r5
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msr IPSR, r6
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pop {r0-r12, pc}
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low_power_restore_cpu
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ldr r1, =low_power_store_addr
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ldr r1, [r1,#12]
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bx r1
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END
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