256 lines
8.1 KiB
C
256 lines
8.1 KiB
C
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/*
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******************************************************************************
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* @file driver_pdm.h
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* @author FreqChip Firmware Team
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* @version V1.0.0
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* @date 2022
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* @brief Header file of pdm HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 FreqChip.
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* All rights reserved.
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******************************************************************************
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*/
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#ifndef __DRIVER_PDM_H__
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#define __DRIVER_PDM_H__
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#include "fr30xx.h"
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#include <math.h>
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/** @addtogroup PDM_Registers_Section
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* @{
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*/
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/* ################################ Register Section Start ################################ */
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/* PDM config register */
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typedef struct
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{
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uint32_t EN : 1;
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uint32_t CLK_EN : 1;
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uint32_t RST : 1;
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uint32_t DAT_INV : 1;
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uint32_t CLK_INV : 1;
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uint32_t USB_MODE : 1;
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uint32_t SAMPLE_RATE : 4;
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uint32_t OSR_MODE : 2;
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uint32_t MONO : 1;
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uint32_t CH_SEL : 1;
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uint32_t LR_SWAP : 1;
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uint32_t HPF_EN : 1;
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uint32_t rsv_0 : 16;
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}REG_PDMConfig_t;
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/* PDM FIFO Reset Register */
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typedef union{
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struct {
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uint32_t PUSH_RST : 1;
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uint32_t POP_RST : 1;
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uint32_t RST : 1;
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uint32_t rsv : 29;
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} s;
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uint32_t rst;
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}REG_PDMFFReset_t;
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/* PDM interrupt Register */
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typedef struct{
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uint32_t FF_FULL : 1;
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uint32_t FF_AFULL : 1;
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uint32_t FF_EMPTY : 1;
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uint32_t rsv : 29;
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}REG_PDMFFInt_t;
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/* PDM interrupt Register */
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typedef struct{
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uint32_t TRIG_LVL : 6;
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uint32_t EN : 1;
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uint32_t rsv : 25;
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}REG_PDMDMA_t;
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/* -----------------------------------------------*/
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/* PDM Register */
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/* -----------------------------------------------*/
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typedef struct
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{
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volatile REG_PDMConfig_t Config; /* Offset 0x00 */
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volatile uint32_t FF_AFLL_LVL; /* Offset 0x04 */
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volatile REG_PDMFFReset_t FF_RST; /* Offset 0x08 */
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volatile REG_PDMFFInt_t INT_EN; /* Offset 0x0C */
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volatile REG_PDMFFInt_t INT_STA; /* Offset 0x10 */
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volatile REG_PDMFFInt_t INT_RAW_STA; /* Offset 0x14 */
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volatile uint32_t VOL_L; /* Offset 0x18 */
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volatile uint32_t VOL_R; /* Offset 0x1C */
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volatile uint32_t rsv1; /* Offset 0x20 */
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volatile uint32_t DATA; /* Offset 0x24 */
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volatile REG_PDMDMA_t DMA_CFG; /* Offset 0x28 */
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}struct_PDM_t;
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#define PDM0 ((struct_PDM_t *)PDM0_BASE)
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#define PDM1 ((struct_PDM_t *)PDM1_BASE)
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#define PDM2 ((struct_PDM_t *)PDM2_BASE)
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/* ################################ Register Section END ################################## */
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/**
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* @}
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*/
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/** @addtogroup PDM_Initialization_Config_Section
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* @{
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*/
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/* ################################ Initialization Config Section Start ################################ */
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/* PDM Sample Rate */
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typedef enum
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{
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PDM_SAMPLE_RATE_8000 = 0x00,
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PDM_SAMPLE_RATE_12000 = 0x01,
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PDM_SAMPLE_RATE_16000 = 0x02,
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PDM_SAMPLE_RATE_24000 = 0x03,
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PDM_SAMPLE_RATE_32000 = 0x04,
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PDM_SAMPLE_RATE_48000 = 0x05,
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PDM_SAMPLE_RATE_96000 = 0x06,
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PDM_SAMPLE_RATE_192000 = 0x07,
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PDM_SAMPLE_RATE_8012 = 0x08,
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PDM_SAMPLE_RATE_11025 = 0x09,
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PDM_SAMPLE_RATE_22050 = 0x0A,
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PDM_SAMPLE_RATE_44100 = 0x0B,
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PDM_SAMPLE_RATE_88200 = 0x0C,
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PDM_SAMPLE_RATE_176400 = 0x0D,
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PDM_SAMPLE_RATE_44_1K_SET = 0x08,
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}enum_PDM_SampleRate_t;
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/* PDM Clock Mode Selection */
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typedef enum{
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PDM_CLOCK_MODE_NORMAL, /* clock from AUPLL2 */
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PDM_CLOCK_MODE_USB, /* clock is 24MHz */
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}enum_PDM_ClockMode_t;
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/* PDM Over Sample Mode */
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typedef enum{
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PDM_OSM_0, // oversampling low level support to all SampleRate.
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PDM_OSM_1, // oversampling middle level support up to 96K.
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PDM_OSM_2, // oversampling high level support up to 48K.
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}enum_PDM_OverSampleMode_t;
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/* PDM Channel Selection in Mono mode */
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typedef enum{
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PDM_MONO_LEFT, /* Mono selcet left */
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PDM_MONO_RIGHT, /* Mono selcet right */
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PDM_STEREO, /* stereo */
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}enum_PDM_ChannelMode_t;
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/* PDM Volume */
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typedef enum{
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PDM_VOL_0,
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PDM_VOL_1,
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PDM_VOL_2,
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PDM_VOL_3,
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PDM_VOL_4,
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PDM_VOL_5,
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PDM_VOL_6,
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PDM_VOL_7,
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PDM_VOL_8,
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PDM_VOL_9,
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PDM_VOL_10,
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PDM_VOL_11,
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PDM_VOL_12,
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PDM_VOL_13,
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PDM_VOL_14,
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PDM_VOL_15,
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PDM_VOL_MAX
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}enum_PDM_Volume_t;
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/*
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* @brief PDM Init Structure definition
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*/
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typedef struct
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{
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uint8_t SampleRate; /* This parameter can be a value of @ref enum_PDM_SampleRate_t */
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uint8_t OverSampleMode; /* This parameter can be a value of @ref enum_PDM_OverSampleMode_t */
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uint8_t ChannelMode; /* This parameter can be a value of @ref enum_PDM_ChannelMode_t */
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int8_t Volume; /* This parameter can be a value with dB as unit */
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uint8_t FIFO_FullThreshold; /* This parameter can be a 5 bit value */
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}struct_PDMInit_t;
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/*
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* @brief PDM handle Structure definition
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*/
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typedef struct __PDM_HandleTypeDef
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{
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struct_PDM_t *PDMx; /*!< PDM registers base address */
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struct_PDMInit_t Init; /*!< PDM communication parameters */
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void (*RxCallback)(struct __PDM_HandleTypeDef *hpdm);
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bool b_RxBusy;
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void *p_RxData;
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}PDM_HandleTypeDef;
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/* ################################ Initialization Config Section END ################################## */
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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#define PDM_FIFO_DEPTH 64
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#define PDM_FIFO_H_FULL (PDM_FIFO_DEPTH / 2)
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#define PDM_VOL_dB(x) (uint32_t)(pow(10.0, (x)/20.0) * 0x2000)
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/* PDM enable/disable */
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#define __PDM_ENABLE(__PDMx__) (__PDMx__->Config.EN = 1)
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#define __PDM_DISABLE(__PDMx__) (__PDMx__->Config.EN = 0)
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/* PDM clock enable/disable */
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#define __PDM_CLK_ENABLE(__PDMx__) (__PDMx__->Config.CLK_EN = 1)
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#define __PDM_CLK_DISABLE(__PDMx__) (__PDMx__->Config.CLK_EN = 0)
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#define __PDM_SWAP_ENABLE(__PDMx__) (__PDMx__->Config.LR_SWAP = 1)
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#define __PDM_SWAP_DISABLE(__PDMx__) (__PDMx__->Config.LR_SWAP = 0)
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/* PDM clock mode. 0: from AUPLL. 1: from 24M */
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#define __PDM_CLK_MODE(__PDMx__, __MODE__) (__PDMx__->Config.USB_MODE = __MODE__)
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/* PDM FIFO interrupt enable/disable */
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#define __PDM_FIFO_FULL_INT_ENABLE(__PDMx__) (__PDMx__->INT_EN.FF_FULL = 1)
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#define __PDM_FIFO_EMPTY_INT_ENABLE(__PDMx__) (__PDMx__->INT_EN.FF_EMPTY = 1)
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#define __PDM_FIFO_ALMOST_FULL_INT_ENABLE(__PDMx__) (__PDMx__->INT_EN.FF_AFULL = 1)
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#define __PDM_FIFO_FULL_INT_DISABLE(__PDMx__) (__PDMx__->INT_EN.FF_FULL = 0)
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#define __PDM_FIFO_EMPTY_INT_DISABLE(__PDMx__) (__PDMx__->INT_EN.FF_EMPTY = 0)
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#define __PDM_FIFO_ALMOST_FULL_INT_DISABLE(__PDMx__) (__PDMx__->INT_EN.FF_AFULL = 0)
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/* PDM FIFO status */
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#define __PDM_IS_FIFO_FULL(__PDMx__) (__PDMx__->INT_RAW_STA.FF_FULL)
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#define __PDM_IS_FIFO_EMPTY(__PDMx__) (__PDMx__->INT_RAW_STA.FF_EMPTY)
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#define __PDM_IS_FIFO_ALMOST_FULL(__PDMx__) (__PDMx__->INT_RAW_STA.FF_AFULL)
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/* Exported functions --------------------------------------------------------*/
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void pdm_IRQHandler(PDM_HandleTypeDef *hpdm);
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/* pdm_init */
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void pdm_init(PDM_HandleTypeDef *hpdm);
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/* pdm_start/stio */
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void pdm_start(PDM_HandleTypeDef *hpdm);
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void pdm_stop(PDM_HandleTypeDef *hpdm);
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/* pdm_start_IT */
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void pdm_start_IT(PDM_HandleTypeDef *hpdm, void *fp_Data);
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/* pdm_vol_set */
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void pdm_vol_set(PDM_HandleTypeDef *hpdm, int8_t vol);
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/* pdm_read_data */
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void pdm_read_data(PDM_HandleTypeDef *hpdm, void *fp_Data);
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#endif
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