A36 PCB1.1 软件工程整理

fr3092_mcu/components/tools/keil/JLinkDevices.xml

@@ -0,0 +1,10 @@
+<DataBase>
+  <!--          -->
+  <!-- FreqChip -->
+  <!--          -->
+  <Device>
+   <ChipInfo Vendor="FreqChip" Name="FR30xx" Core="JLINK_CORE_CORTEX_M33" WorkRAMAddr="0x20000000" WorkRAMSize="0x8000"/>
+    	<FlashBankInfo Name="Internal Flash" BaseAddr="0x08000000" MaxSize="0x1000000" Loader="Devices/Freqchip/FR30xx.FLM" LoaderType="FLASH_ALGO_TYPE_OPEN" AlwaysPresent="1"/>
+		<FlashBankInfo Name="External Flash" BaseAddr="0x10000000" MaxSize="0x8000000" Loader="Devices/Freqchip/FR30xx_ext.FLM" LoaderType="FLASH_ALGO_TYPE_OPEN" AlwaysPresent="1"/>
+  </Device>
+</DataBase>

fr3092_mcu/components/tools/keil/debug_xip_flash.ini

@@ -0,0 +1,64 @@
+/*  使用说明
+    1，使用xip_flash.sct作为链接文件；
+    2，工程选项的Debug标签页中，初始化文件(Initialization File)选择：debug_xip_flash.ini
+    3，【重要】Utilities标签页中，取消选择：Update Target before Debugging
+*/
+ 
+ 
+/*----------------------------------------------------------------------------
+ * Name:    debug_xip_flash.ini
+ * Purpose: XIP Debug Initialization File
+ *----------------------------------------------------------------------------*/
+ 
+/*----------------------------------------------------------------------------
+  Setup()  configure PC & SP for RAM Debug
+ *----------------------------------------------------------------------------*/
+FUNC void Setup (void) {
+  _WDWORD(0xE0050020, 0xffffffff);
+  _WDWORD(0xE0050024, 0xffffffff);
+  _WDWORD(0xE0050028, 0xffffffff);
+  _WDWORD(0xE005002c, 0xffffffff);
+  _WDWORD(0xE0050030, 0xffffffff);
+  _WDWORD(0xE0050034, 0xffffffff);
+  _WDWORD(0xE0050038, 0xffffffff);
+  _WDWORD(0xE005003c, 0xffffffff);
+  _WDWORD(0xE0050040, 0xffffffff);
+  _WDWORD(0xE0050044, 0xffffffff);
+  SP = _RDWORD(0x08002000);          // Setup Stack Pointer
+  PC = _RDWORD(0x08002004);          // Setup Program Counter
+  _WDWORD(0xE000ED08, 0x08002000);   // Setup Vector Table Offset Register
+
+  // Enable Cache
+  if ((_RDWORD(0xE00B0004) & 0x03) == 0x00) {
+    _WDWORD(0xE00B0000, 0x00000038);
+    _WDWORD(0xE00B0000, 0x0000003C);
+    _WDWORD(0x20000000, 0x12345678);
+    _WDWORD(0x20000004, 0x12345678);
+    _WDWORD(0x20000008, 0x12345678);
+    _WDWORD(0x2000000c, 0x12345678);
+    _WDWORD(0x20000010, 0x12345678);
+    _WDWORD(0x20000014, 0x12345678);
+    _WDWORD(0x20000018, 0x12345678);
+    _WDWORD(0x2000001c, 0x12345678);
+    _WDWORD(0xE00B0000, 0x0000003E);
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0x20000000, _RDWORD(0x20000000));
+    _WDWORD(0xE00B0000, 0x0000003D);
+  } 
+}
+
+FUNC void OnResetExec (void)  {      // executes upon software RESET
+  Setup();                           // Setup for Running
+}
+
+load %L incremental
+ 
+Setup();                             // Setup for Running
+ 
+//g, main

fr3092_mcu/components/tools/keil/post_process.bat

@@ -0,0 +1,40 @@
+@echo off
+
+echo %DATE:~0,4%%DATE:~5,2%%DATE:~8,2%
+echo %TIME%
+
+set output_path=%cd%\output
+
+:: project name
+set project_name=%~1
+:: input elf file path
+set elf_path=%~2
+:: compiler include file path
+set compiler_include_path=%~3
+:: this script path
+set bat_script_path=%~0
+
+if "%project_name%" == "" goto parameter_error
+if "%elf_path%" == "" goto parameter_error
+if "%compiler_include_path%" == "" goto parameter_error
+
+::echo %output_path%
+::echo %project_name%
+::echo %elf_path%
+::echo %compiler_include_path:~0,-8%
+
+set fromelf_cmd=%compiler_include_path:~0,-8%\bin\fromelf.exe
+set output_prefix=%output_path%\%project_name%
+
+%fromelf_cmd% --text -c -o "%output_prefix%.txt" "%elf_path%"
+%fromelf_cmd% --vhx --32X1  -c -o "%output_prefix%.hex" "%elf_path%"
+%fromelf_cmd% --bin -o "%output_prefix%.bin" "%elf_path%"
+
+set python_script_path=%bat_script_path:~0,-22%\post_process.py
+
+python "%python_script_path%" "%project_name%" "%output_path%"
+exit /b 0
+
+:parameter_error
+echo "missing input parameters"
+exit /b 1

fr3092_mcu/components/tools/keil/psram_ft_3092e.sct

@@ -0,0 +1,46 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x20040000 0x000FE000  {    ; load region size_region
+  ER_IROM1 0x20040000 0x000FE000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_RAM_CODE +0 {
+   *(ram_code)
+   rpmsg.o
+   rpmsg_lite.o
+   rpmsg_queue.o
+   llist.o
+   virtqueue.o
+   rpmsg_env_freertos.o
+   rpmsg_platform.o
+   
+   list.o
+   queue.o
+   tasks.o
+   timers.o
+   port.o
+   portasm.o
+   heap_6.o
+   ke_mem.o
+   
+   audio_decoder.o
+   audio_encoder.o
+   audio_hw.o
+   audio_scene.o
+   algorithm.o
+   codec.o
+   resample.o
+  }
+  RW_IRAM1 +0  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+  RW_PSRAM 0x30000000 UNINIT 0x10000000 {  ; RW data
+   .ANY (NoInit)
+  }
+}
+

fr3092_mcu/components/tools/keil/xip_flash.sct

@@ -0,0 +1,19 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08002000 0x000FE000  {    ; load region size_region
+  ER_IROM1 0x08002000 0x000FE000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_RAM_CODE 0x1FFE0000 0x20000 {
+   *(ram_code)
+  }
+  RW_IRAM1 0x20000000 0x000C0000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

fr3092_mcu/components/tools/keil/xip_flash_add_psram.sct

@@ -0,0 +1,46 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08002000 0x000FE000  {    ; load region size_region
+  ER_IROM1 0x08002000 0x000FE000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_RAM_CODE 0x1FFE0000 0x20000 {
+   *(ram_code)
+   rpmsg.o
+   rpmsg_lite.o
+   rpmsg_queue.o
+   llist.o
+   virtqueue.o
+   rpmsg_env_freertos.o
+   rpmsg_platform.o
+   
+   list.o
+   queue.o
+   tasks.o
+   timers.o
+   port.o
+   portasm.o
+   heap_6.o
+   ke_mem.o
+   
+   audio_decoder.o
+   audio_encoder.o
+   audio_hw.o
+   audio_scene.o
+   algorithm.o
+   codec.o
+   resample.o
+  }
+  RW_IRAM1 0x20000000 0x000C0000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+  RW_PSRAM 0x30000000 UNINIT 0x10000000 {  ; RW data
+   .ANY (NoInit)
+  }
+}
+

fr3092_mcu/components/tools/keil/xip_flash_fr3066d.sct

@@ -0,0 +1,28 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08002000 0x000FE000  {    ; load region size_region
+  ER_IROM1 0x08002000 0x000FE000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_RAM_CODE 0x1FFE0000 0x20000 {
+   *(ram_code)
+   
+   list.o
+   queue.o
+   tasks.o
+   timers.o
+   port.o
+   portasm.o
+   heap_6.o
+   ke_mem.o
+  }
+  RW_IRAM1 0x20000000 0x00020000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

fr3092_mcu/components/tools/keil/xip_flash_fr3068e.sct

@@ -0,0 +1,28 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08002000 0x000FE000  {    ; load region size_region
+  ER_IROM1 0x08002000 0x000FE000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_RAM_CODE 0x1FFE0000 0x20000 {
+   *(ram_code)
+   
+   list.o
+   queue.o
+   tasks.o
+   timers.o
+   port.o
+   portasm.o
+   heap_6.o
+   ke_mem.o
+  }
+  RW_IRAM1 0x20000000 0x00080000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

fr3092_mcu/components/tools/keil/xip_flash_turn_key.sct

@@ -0,0 +1,67 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08072000 0x00160000  {    ; load region size_region
+  ER_IROM1 0x08072000 0x00160000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+
+  RW_RAM_CODE 0x1FFE0000 0x20000 {
+   *(ram_code)
+   rpmsg.o
+   rpmsg_lite.o
+   rpmsg_queue.o
+   llist.o
+   virtqueue.o
+   rpmsg_env_freertos.o
+   rpmsg_platform.o
+   
+   list.o
+   queue.o
+   tasks.o
+   timers.o
+   port.o
+   portasm.o
+   heap_6.o
+   ke_mem.o
+   
+   audio_decoder.o
+   audio_encoder.o
+   audio_hw.o
+   audio_scene.o
+   algorithm.o
+   codec.o
+   resample.o
+
+   lv_obj_pos.o
+   *lv_obj_style.o
+   *lv_src_draw.lib(+RO)
+  }
+
+  RW_SRAM 0x20000000 0x000c0000 {
+    .ANY (+ZI +RW)
+  }
+
+  RW_DRAM 0x200c0000 0x00020000  {
+    a2alloc.o(+ZI)
+    avalloc.o(+ZI)
+    avdevice.o(+ZI)
+    btalloc.o(+ZI)
+    hfalloc.o(+ZI)
+    hfgalloc.o(+ZI)
+    goep.o(+ZI)
+    obxalloc.o(+ZI)
+    pbap.o(+ZI)
+    avrcp.o(+ZI)
+    *(dram_section)
+  }
+
+  RW_PSRAM 0x30000000 UNINIT 0x10000000 {  ; RW data
+   .ANY (NoInit)
+  }
+}
+

fr3092_mcu/components/tools/post_process.py

@@ -0,0 +1,95 @@
+import os, sys
+import struct
+import zlib
+
+CHIP_TYPE_FR303x = 0
+CHIP_TYPE_FR509x = 1
+
+CHIP_TYPE = CHIP_TYPE_FR509x
+
+UNPROTECT = 1                   # unprotect enable, for OTA
+VOLATILE_MODE = 1               # volatile mode enable when unprotect flash, for OTA
+UNPROTECT_BITS = 0x00           # protect bits setting when unprotect flash, for OTA
+DEAL_CMP_BIT = 1                # deal cmp bit when unprotect flash, for OTA
+CMP_BIT_POS = 6                 # cmp bit position in status-2, for OTA
+WRITE_STATUS_2_SEPERATE = 1     # write status-2 with 0x31(1) or 0x01(0) when unprotect flash, for OTA
+ENABLE_CACHE_FOR_B = 0          # enable cache in ota procedure, for OTA
+QSPI_DIVIDOR = 1                # qspi dividor
+WRITE_TYPE = 0                  # write type
+READ_TYPE = 2                   # read type
+OVERLAP = 1                     # execute and store zone of B is overlap or not, for OTA
+ENABLE_CACHE_FOR_U = 1          # enable cache before enter user code
+CMP_BIT_SET = 0                 # cmp bit setting when unprotect flash, for OTA
+REPROTECT = 0                   # reset protect bits after OTA is finished, for OTA
+
+def fill_header(f_in_file, 
+                    f_out_file, 
+                    store_offset,
+                    version = 0xffffffff,
+                    exec_offset = 0x2000,
+                    copy_unit = 16*1024,
+                    copy_flag_store_step = 32):
+    info_crc = 0xffffffff
+    code_length = os.path.getsize(f_in_file)
+    f_out = open(f_out_file, 'wb')
+    f_out.write(struct.pack('I', version))
+    f_out.write(struct.pack('I', store_offset))
+    f_out.write(struct.pack('I', code_length))
+    f_out.write(struct.pack('I', exec_offset))
+    f_out.write(struct.pack('I', copy_unit))
+    f_out.write(struct.pack('I', copy_flag_store_step))
+    f_in = open(f_in_file, 'rb')
+    array = f_in.read(code_length)
+    image_crc = zlib.crc32(array)
+    
+    f_out.write(struct.pack('B', image_crc&0xff))
+    f_out.write(struct.pack('B', (image_crc&0xff00)>>8))    
+    f_out.write(struct.pack('B', (image_crc&0xff0000)>>16))    
+    f_out.write(struct.pack('B', (image_crc&0xff000000)>>24))
+
+    #f_out.write(struct.pack('I', image_crc))
+    f_out.write(struct.pack('I', 0x51525251))
+    if CHIP_TYPE == CHIP_TYPE_FR509x:
+        image_tlv_length = 0
+        f_out.write(struct.pack('I', image_tlv_length))
+    options = (UNPROTECT<<0)        \
+                | (VOLATILE_MODE<<1)    \
+                | (UNPROTECT_BITS<<2) \
+                | (DEAL_CMP_BIT<<7)    \
+                | (CMP_BIT_POS<<8)    \
+                | (WRITE_STATUS_2_SEPERATE<<11)   \
+                | (ENABLE_CACHE_FOR_B<<12)   \
+                | (QSPI_DIVIDOR<<13)   \
+                | (WRITE_TYPE<<17)   \
+                | (READ_TYPE<<19)   \
+                | (OVERLAP<<22)     \
+                | (ENABLE_CACHE_FOR_U<<23)  \
+                | (CMP_BIT_SET<<24) \
+                | (REPROTECT<<25)
+    f_out.write(struct.pack('I', options))
+    f_out.write(struct.pack('I', info_crc))
+    f_out.write(struct.pack('I', 0x51525251))
+    first_sector_last_size = 0
+    if CHIP_TYPE == CHIP_TYPE_FR509x:
+        first_sector_last_size = 0x1000-12*4
+    else:
+        first_sector_last_size = 0x1000-4-9*4
+    for i in range(first_sector_last_size):
+        f_out.write(struct.pack('B', 0xff))
+    f_out.seek(0x2000)
+    f_out.write(array)
+    f_out.close()
+
+if __name__ == '__main__':
+    '''
+    argv[1]: project name
+    argv[2]: output path
+    '''
+
+    input_bin_name = "%s\\%s.bin" % (sys.argv[2], sys.argv[1])
+    if os.path.exists(input_bin_name):
+        output_bin_name = "%s\\%s_burn.bin" % (sys.argv[2], sys.argv[1])
+        fill_header(input_bin_name, output_bin_name, 0)
+        print("program target with file %s" % output_bin_name)
+    else:
+        print("INVALID INPUT PARAMTER for python script")