149 lines
5.2 KiB
C
149 lines
5.2 KiB
C
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/*
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******************************************************************************
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* @file driver_aes.h
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* @author FreqChip Firmware Team
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* @version V1.0.0
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* @date 2022
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* @brief Header file of aes module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 FreqChip.
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* All rights reserved.
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******************************************************************************
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*/
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#ifndef __DRIVER_AES_H__
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#define __DRIVER_AES_H__
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#include "fr30xx.h"
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/** @addtogroup AES_Registers_Section
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* @{
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*/
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/* ################################ Register Section Start ################################ */
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/*AES CTRL REG 0x40*/
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typedef volatile union
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{
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volatile uint32_t Word;
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struct
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{
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uint32_t START : 1;//AES work enable,this bit only maintain active for one cycle and is cleared automatically
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uint32_t KEY_INT_EN : 1;//whehter key expand finish interrupt enable
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uint32_t DATA_INT_EN : 1;//whether encrypt or decrypt finish interrupt enable
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uint32_t CBC : 1;//CBC mode or ECB mode
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uint32_t KEY_LEN : 2;//00->128bit 01->192bit 10->256bit 11->reserved
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uint32_t OPCODE : 2;//00->encrypt 01->decrypt 10->keyexpand 11->reserved
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uint32_t ENDIAN_SEL : 1;//0->small endian for data register 1->big endian for data register
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uint32_t RSV : 23;
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} Bits;
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} REG_AES_CTRL_t;
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/*AES STATE REG 0x44*/
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typedef volatile union
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{
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volatile uint32_t Word;
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struct
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{
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uint32_t BUSY : 1;//busy indication bit
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uint32_t KEY_INT_FLAG : 1;//key expand finish interrupt flag
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uint32_t DATA_INT_FLAG : 1;//data finish interrupt flag
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uint32_t RSV : 29;
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} Bits;
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} REG_AES_STATE_t;
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/* ------------------------------------------------*/
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/* AES Register */
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/* ------------------------------------------------*/
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typedef struct
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{
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volatile uint32_t DATAIN_0; /* Offset 0x00 */
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volatile uint32_t DATAIN_1; /* Offset 0x04 */
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volatile uint32_t DATAIN_2; /* Offset 0x08 */
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volatile uint32_t DATAIN_3; /* Offset 0x0C */
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volatile uint32_t KEY_0; /* Offset 0x10 */
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volatile uint32_t KEY_1; /* Offset 0x14 */
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volatile uint32_t KEY_2; /* Offser 0x18 */
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volatile uint32_t KEY_3; /* Offser 0x1c */
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volatile uint32_t KEY_4; /* Offser 0x20 */
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volatile uint32_t KEY_5; /* Offser 0x24 */
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volatile uint32_t KEY_6; /* Offser 0x28 */
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volatile uint32_t KEY_7; /* Offset 0x2C */
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volatile uint32_t IV_0; /* Offset 0x30 */
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volatile uint32_t IV_1; /* Offset 0x34 */
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volatile uint32_t IV_2; /* Offset 0x38 */
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volatile uint32_t IV_3; /* Offset 0x3C */
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volatile REG_AES_CTRL_t AES_CTRL; /* Offset 0x40 */
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volatile REG_AES_STATE_t AES_STATE; /* Offset 0x44 */
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volatile uint32_t DATAOUT_0; /* Offset 0x48 */
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volatile uint32_t DATAOUT_1; /* Offset 0x4C */
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volatile uint32_t DATAOUT_2; /* Offset 0x50 */
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volatile uint32_t DATAOUT_3; /* Offset 0x54 */
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}struct_SEC_AES_t;
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#define SEC_AES ((struct_SEC_AES_t *)(SEC_BASE))
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/* ################################ Register Section END ################################## */
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/**
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* @}
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*/
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/** @addtogroup AES_Initialization_Config_Section
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* @{
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*/
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/* ################################ Initialization Config Section Start ################################ */
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#define AES_OPCODE_ENCRYPT (0)
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#define AES_OPCODE_DECRYPT (1)
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#define AES_OPCODE_KEY_EXPAND (2)
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#define AES_CBC_MODE_DISABLE (0)
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#define AES_CBC_MODE_ENABLE (1)
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typedef enum
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{
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AES_ECB_128,
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AES_ECB_192,
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AES_ECB_256,
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AES_CBC_128,
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AES_CBC_192,
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AES_CBC_256,
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}enum_AES_MODE_t;
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typedef enum
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{
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AES_SMALL_ENDIAN, /* small endian for data register */
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AES_BIG_ENDIAN, /* big endian for data register */
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}enum_ENDIAN_t;
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/* ################################ Initialization Config Section END ################################## */
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/* get aes status */
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#define __AES_IS_BUSY() (SEC_AES->AES_STATE.Bits.BUSY)
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/* set aes opcode */
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#define __AES_SET_OPCODE(__OPCODE__) (SEC_AES->AES_CTRL.Bits.OPCODE = __OPCODE__)
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/* aes work start */
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#define __AES_WORK_START() (SEC_AES->AES_CTRL.Bits.START = 1)
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/* Exported functions --------------------------------------------------------*/
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/* AES config */
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void aes_config(enum_AES_MODE_t fe_Mode, enum_ENDIAN_t fe_Endian);
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/* AES set key/iv */
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void aes_set_encrypt_key(uint8_t *key);
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void aes_set_encrypt_iv(uint8_t *iv);
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/* AES encrypt/decrypt */
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void aes_encrypt(uint8_t *fp_Data_In, uint32_t fu32_Size, uint8_t *fp_Data_Out);
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void aes_decrypt(uint8_t *fp_Data_In, uint32_t fu32_Size, uint8_t *fp_Data_Out);
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#endif
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