126 lines
4.9 KiB
C
126 lines
4.9 KiB
C
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/*
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* flash.h
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*
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* Created on: 2018-1-25
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* Author: owen
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*/
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#ifndef _DRIVER_FLASH_H
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#define _DRIVER_FLASH_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "driver_qspi.h"
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#define FLASH_READ_DEVICE_ID 0x90
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#define FLASH_READ_IDENTIFICATION 0x9F
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#define FLASH_AAI_PROGRAM_OPCODE 0xAF
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#define FLASH_PAGE_PROGRAM_OPCODE 0x02
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#define FLASH_READ_OPCODE 0x03
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#define FLASH_FAST_READ_OPCODE 0x0B
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#define FLASH_FAST_DTR_READ_OPCODE 0x0D
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#define FLASH_READ_DUAL_OPCODE 0xBB
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#define FLASH_READ_DTR_DUAL_OPCODE 0xBD
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#define FLASH_READ_DUAL_OPCODE_2 0x3B
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#define FLASH_PAGE_DUAL_PROGRAM_OPCODE 0xA2
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#define FLASH_PAGE_QUAL_READ_OPCODE 0xEB
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#define FLASH_PAGE_DTR_QUAL_READ_OPCODE 0xED
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#define FLASH_PAGE_QUAL_READ_OPCODE_2 0x6B
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#define FLASH_PAGE_QUAL_PROGRAM_OPCODE 0x32
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#define FLASH_CHIP_ERASE_OPCODE 0x60
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#define FLASH_SECTORE_ERASE_OPCODE 0x20
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#define FLASH_BLOCK_32K_ERASE_OPCODE 0x52
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#define FLASH_BLOCK_64K_ERASE_OPCODE 0xD8
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#define FLASH_ST_SECTORE_ERASE_OPCODE 0xD8
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#define FLASH_ST_BULK_ERASE_OPCODE 0xC7
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#define FLASH_WRITE_DISABLE_OPCODE 0x04
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#define FLASH_WRITE_ENABLE_OPCODE 0x06
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#define FLASH_WRITE_STATUS_REG_OPCODE 0x01
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#define FLASH_READ_STATUS_REG_OPCODE 0x05
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#define FLASH_READ_STATUS_HIGH_REG_OPCODE 0x35
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#define FLASH_SEC_REG_READ_OPCODE (0x48)
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#define FLASH_SEC_REG_PROGRAM_OPCODE (0x42)
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#define FLASH_SEC_REG_ERASE_OPCODE (0x44)
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#define FLASH_ST_ID 0x20
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#define FLASH_SST_ID 0xBF
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#define FLASH_OP_TYPE_ERASE 0
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#define FLASH_OP_TYPE_WRITE 1
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enum flash_rd_type_t {
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FLASH_RD_TYPE_SINGLE,
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FLASH_RD_TYPE_SINGLE_FAST,
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FLASH_RD_TYPE_DUAL,
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FLASH_RD_TYPE_DUAL_FAST,
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FLASH_RD_TYPE_QUAD,
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FLASH_RD_TYPE_QUAD_FAST,
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FLASH_RD_TYPE_DTR_SINGLE_FAST,
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FLASH_RD_TYPE_DTR_DUAL_FAST,
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FLASH_RD_TYPE_DTR_QUAD_FAST,
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};
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enum flash_wr_type_t {
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FLASH_WR_TYPE_SINGLE,
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FLASH_WR_TYPE_DUAL,
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FLASH_WR_TYPE_QUAD,
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};
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void flash_set_read_fast_quad(struct qspi_regs_t *qspi);
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void flash_set_read_quad(struct qspi_regs_t *qspi);
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void flash_set_read_fast_dual(struct qspi_regs_t *qspi);
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void flash_set_read_dual(struct qspi_regs_t *qspi);
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void flash_set_read_fast_single(struct qspi_regs_t *qspi);
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void flash_set_read_single(struct qspi_regs_t *qspi);
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void flash_set_write_quad(struct qspi_regs_t *qspi);
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void flash_set_write_dual(struct qspi_regs_t *qspi);
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void flash_set_write_single(struct qspi_regs_t *qspi);
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uint16_t flash_read_status(struct qspi_regs_t *qspi, bool read_high);
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void flash_write_status(struct qspi_regs_t *qspi, uint16_t status_entity, bool write_high);
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void flash_write_status_volatile(struct qspi_regs_t *qspi, uint16_t status, bool write_high);
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void flash_write_status_2(struct qspi_regs_t *qspi, uint8_t status);
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void flash_write_status_2_volatile(struct qspi_regs_t *qspi, uint8_t status);
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uint8_t flash_write(struct qspi_regs_t *qspi, uint32_t offset, uint32_t length, const uint8_t *buffer);
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uint8_t flash_read(struct qspi_regs_t *qspi, uint32_t offset, uint32_t length, uint8_t *buffer);
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uint8_t flash_erase(struct qspi_regs_t *qspi, uint32_t offset, uint32_t size);
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void flash_chip_erase(struct qspi_regs_t *qspi);
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void flash_enter_deep_sleep(struct qspi_regs_t *qspi);
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void flash_exit_deep_sleep(struct qspi_regs_t *qspi);
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void flash_enable_quad(struct qspi_regs_t *qspi);
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void flash_set_IO_DRV(struct qspi_regs_t *qspi, uint8_t drv);
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void flash_set_capture_delay(struct qspi_regs_t *qspi, uint8_t delay);
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void flash_init_controller(struct qspi_regs_t *qspi, enum flash_rd_type_t rd_type, enum flash_wr_type_t wr_type);
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uint32_t flash_init(struct qspi_regs_t *qspi);
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uint32_t flash_read_id(struct qspi_regs_t *qspi);
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void flash_set_baudrate(struct qspi_regs_t *qspi, uint8_t baudrate);
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void flash_OTP_read(struct qspi_regs_t *qspi,uint32_t offset, uint32_t length, uint8_t *buffer);
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void flash_OTP_write(struct qspi_regs_t *qspi,uint32_t offset, uint32_t length, uint8_t *buffer);
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void flash_OTP_erase(struct qspi_regs_t *qspi,uint32_t offset);
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/************************************************************************************
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* @fn flash_protect_bit_set
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*
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* @brief set flash protection relevant bits.
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*
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* @param qspi: qspi controller base address
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* bits: flash protection bits in status 1, BIT4:0 is valid.
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* cmp: flash protection compare bit in status 2.
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* 0xff means this field should be ignored
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* BIT7: clear or set CMP bit
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* BIT0-2: CMP bit offset in status 2
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* wr_volatile: write status registers in volatile mode or not
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* status_2_separate: write status 2 together with status 1 or separately
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*/
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void flash_protect_bit_set(struct qspi_regs_t *qspi, uint8_t bits, uint8_t cmp, uint8_t wr_volatile, uint8_t status_2_separate);
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#endif /* _DRIVER_FLASH_H */
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