81 lines
2.3 KiB
C
81 lines
2.3 KiB
C
/*
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******************************************************************************
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* @file driver_qspi.c
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* @author FreqChip Firmware Team
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* @version V1.0.0
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* @date 2021
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* @brief QSPI module driver.
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* This file provides firmware functions to manage the
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* Quad Serial Peripheral Interface (QSPI) peripheral
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2021 FreqChip.
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* All rights reserved.
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******************************************************************************
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*/
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#include "fr30xx.h"
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#define QSPI_STIG_MAX_SINGLE_LEN 8
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#define QSPI_STIG_BANK_DEPTH 128
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__RAM_CODE int qspi_stig_cmd(struct qspi_regs_t *QSPI, struct qspi_stig_reg_t cmd, enum qspi_stig_cmd_type_t type, int len, uint8_t *buffer)
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{
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uint32_t tmp_u32[2];
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uint8_t *tmp_u8 = (uint8_t *)tmp_u32;
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if(type == QSPI_STIG_CMD_BANK_READ) {
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if(QSPI_STIG_BANK_DEPTH < len) {
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return -1;
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}
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}
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else {
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if(QSPI_STIG_MAX_SINGLE_LEN < len) {
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return -1;
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}
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}
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while(__QSPI_IS_BUSY(QSPI));
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if(type == QSPI_STIG_CMD_EXE) {
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__QSPI_STIG_CMD_SET(QSPI, cmd);
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__QSPI_STIG_EXECUTE(QSPI);
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while(__QSPI_STIG_ON_GOING(QSPI));
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}
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else {
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if(type == QSPI_STIG_CMD_WRITE) {
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for (volatile int32_t i=0; i<len; i++) {
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*tmp_u8++ = *buffer++;
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}
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__QSPI_STIG_DATA_L_SET(QSPI, tmp_u32[0]);
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__QSPI_STIG_DATA_H_SET(QSPI, tmp_u32[1]);
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__QSPI_STIG_CMD_SET(QSPI, cmd);
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__QSPI_STIG_WRITE_BYTES_SET(QSPI, len);
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__QSPI_STIG_EXECUTE(QSPI);
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while(__QSPI_STIG_ON_GOING(QSPI));
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}
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else {
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__QSPI_STIG_CMD_SET(QSPI, cmd);
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__QSPI_STIG_READ_BYTES_SET(QSPI, len);
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__QSPI_STIG_EXECUTE(QSPI);
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while(__QSPI_STIG_ON_GOING(QSPI));
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if(type == QSPI_STIG_CMD_READ) {
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tmp_u32[0] = __QSPI_STIG_DATA_L_GET(QSPI);
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tmp_u32[1] = __QSPI_STIG_DATA_H_GET(QSPI);
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for (volatile int32_t i=0; i<len; i++) {
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*buffer++ = *tmp_u8++;
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}
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}
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else {
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//TBD, BANK READ
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}
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}
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}
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return 0;
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}
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