151 lines
4.1 KiB
Markdown
151 lines
4.1 KiB
Markdown
# ST Ports
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Support for the STM32 L4, F1, F2, F4 and F7 on-board crypto hardware acceleration:
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- symmetric AES (ECB/CBC/CTR/GCM)
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- MD5/SHA1/SHA224/SHA256
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Support for the STM32 PKA on WB55, H7 and other devices with on-board public-key acceleration:
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- ECC192/ECC224/ECC256/ECC384
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Support for the STSAFE-A100 crypto hardware accelerator co-processor via I2C for ECC supporting NIST or Brainpool 256-bit and 384-bit curves. It requires the ST-Safe SDK including wolf stsafe_interface.c/.h files. Please contact ST for these.
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For details see our [wolfSSL ST](https://www.wolfssl.com/docs/stm32/) page.
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## STM32 Symmetric Acceleration
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We support using the STM32 CubeMX and Standard Peripheral Library.
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### Building
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To enable support define one of the following:
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```
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#define WOLFSSL_STM32L4
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#define WOLFSSL_STM32F1
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#define WOLFSSL_STM32F2
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#define WOLFSSL_STM32F4
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#define WOLFSSL_STM32F7
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```
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To use CubeMX define `WOLFSSL_STM32_CUBEMX` otherwise StdPeriLib is used.
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To disable portions of the hardware acceleration you can optionally define:
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```
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#define NO_STM32_RNG
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#define NO_STM32_CRYPTO
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#define NO_STM32_HASH
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```
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### Coding
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In your application you must include <wolfssl/wolfcrypt/settings.h> before any other wolfSSL headers. If building the sources directly we recommend defining `WOLFSSL_USER_SETTINGS` and adding your own `user_settings.h` file. You can find a good reference for this in `IDE/GCC-ARM/Header/user_settings.h`.
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### Benchmarks
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See our [benchmarks](https://www.wolfssl.com/docs/benchmarks/) on the wolfSSL website.
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## STM32 PKA (Public Key Acceleration)
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STM32 PKA is present in STM32WB55 as well as STM32H7 series.
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### Building
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To enable support define the following
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`WOLFSSL_STM32_PKA`
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### Using
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When the support is enabled, the ECC operations will be accelerated using the PKA crypto co-processor.
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## STSAFE-A100 ECC Acceleration
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Using the wolfSSL PK callbacks and the reference ST Safe reference API's we support an ECC only cipher suite such as ECDHE-ECDSA-AES128-SHA256 for TLS client or server.
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At the wolfCrypt level we also support ECC native API's for `wc_ecc_*` using the ST-Safe.
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### Building
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`./configure --enable-pkcallbacks CFLAGS="-DWOLFSSL_STSAFEA100"`
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or
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`#define HAVE_PK_CALLBACKS`
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`#define WOLFSSL_STSAFEA100`
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### Coding
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Setup the PK callbacks for TLS using:
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```
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/* Setup PK Callbacks for STSAFE-A100 */
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WOLFSSL_CTX* ctx;
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wolfSSL_CTX_SetEccKeyGenCb(ctx, SSL_STSAFE_CreateKeyCb);
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wolfSSL_CTX_SetEccSignCb(ctx, SSL_STSAFE_SignCertificateCb);
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wolfSSL_CTX_SetEccVerifyCb(ctx, SSL_STSAFE_VerifyPeerCertCb);
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wolfSSL_CTX_SetEccSharedSecretCb(ctx, SSL_STSAFE_SharedSecretCb);
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wolfSSL_CTX_SetDevId(ctx, 0); /* enables wolfCrypt `wc_ecc_*` ST-Safe use */
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```
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The reference STSAFE-A100 PK callback functions are located in the `wolfcrypt/src/port/st/stsafe.c` file.
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Adding a custom context to the callbacks:
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```
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/* Setup PK Callbacks context */
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WOLFSSL* ssl;
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void* myOwnCtx;
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wolfSSL_SetEccKeyGenCtx(ssl, myOwnCtx);
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wolfSSL_SetEccVerifyCtx(ssl, myOwnCtx);
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wolfSSL_SetEccSignCtx(ssl, myOwnCtx);
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wolfSSL_SetEccSharedSecretCtx(ssl, myOwnCtx);
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```
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### Benchmarks and Memory Use
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Software only implementation (STM32L4 120Mhz, Cortex-M4, Fast Math):
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```
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ECDHE 256 key gen SW 4 ops took 1.278 sec, avg 319.500 ms, 3.130 ops/sec
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ECDHE 256 agree SW 4 ops took 1.306 sec, avg 326.500 ms, 3.063 ops/sec
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ECDSA 256 sign SW 4 ops took 1.298 sec, avg 324.500 ms, 3.082 ops/sec
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ECDSA 256 verify SW 2 ops took 1.283 sec, avg 641.500 ms, 1.559 ops/sec
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```
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Memory Use:
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```
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Peak Stack: 18456
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Peak Heap: 2640
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Total: 21096
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```
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STSAFE-A100 acceleration:
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```
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ECDHE 256 key gen HW 8 ops took 1.008 sec, avg 126.000 ms, 7.937 ops/sec
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ECDHE 256 agree HW 6 ops took 1.051 sec, avg 175.167 ms, 5.709 ops/sec
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ECDSA 256 sign HW 14 ops took 1.161 sec, avg 82.929 ms, 12.059 ops/sec
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ECDSA 256 verify HW 8 ops took 1.184 sec, avg 148.000 ms, 6.757 ops/sec
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```
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Memory Use:
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```
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Peak Stack: 9592
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Peak Heap: 170
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Total: 9762
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```
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## Support
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Email us at [support@wolfssl.com](mailto:support@wolfssl.com).
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