A27R版本修改
This commit is contained in:
BIN
A58-AMTLDR/AMT630Hv100/Exe/AMTLDR.bin
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Exe/AMTLDR.bin
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Exe/AMTLDR.out
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Exe/AMTLDR.out
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Exe/spildr.bin
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Exe/spildr.bin
Normal file
Binary file not shown.
361
A58-AMTLDR/AMT630Hv100/List/AMTLDR.map
Normal file
361
A58-AMTLDR/AMT630Hv100/List/AMTLDR.map
Normal file
@ -0,0 +1,361 @@
|
||||
###############################################################################
|
||||
#
|
||||
# IAR ELF Linker V8.30.1.114/W32 for ARM 05/Mar/2025 14:11:33
|
||||
# Copyright 2007-2018 IAR Systems AB.
|
||||
#
|
||||
# Output file = G:\mengxun\A58-AMTLDR\AMT630Hv100\Exe\AMTLDR.out
|
||||
# Map file = G:\mengxun\A58-AMTLDR\AMT630Hv100\List\AMTLDR.map
|
||||
# Command line =
|
||||
# -f C:\Users\13669\AppData\Local\Temp\EWA971.tmp
|
||||
# (G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\Boot.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\clockcfg.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\cp15.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\cp15_asm_iar.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\crc32.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\diskio.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\Entry.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\exception.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\ff.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\gpio.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\mmu.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\sdmmc.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\SpiBooter.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\SpinandBooter.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\sysinfo.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\timer.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\UartPrint.o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\wdt.o --no_out_extension -o
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\Exe\AMTLDR.out --map
|
||||
# G:\mengxun\A58-AMTLDR\AMT630Hv100\List\AMTLDR.map --config
|
||||
# G:\mengxun\A58-AMTLDR\AMTLDR.icf --semihosting --entry
|
||||
# __iar_program_start --vfe --text_out locale)
|
||||
#
|
||||
###############################################################################
|
||||
|
||||
*******************************************************************************
|
||||
*** RUNTIME MODEL ATTRIBUTES
|
||||
***
|
||||
|
||||
CppFlavor = *
|
||||
__SystemLibrary = DLib
|
||||
__dlib_version = 6
|
||||
|
||||
|
||||
*******************************************************************************
|
||||
*** HEAP SELECTION
|
||||
***
|
||||
|
||||
The basic heap was selected because no calls to memory allocation
|
||||
functions were found in the application outside of system library
|
||||
functions, and there are calls to deallocation functions in the
|
||||
application.
|
||||
|
||||
|
||||
*******************************************************************************
|
||||
*** PLACEMENT SUMMARY
|
||||
***
|
||||
|
||||
"A0": place at 0x30'0000 { ro section .intvec };
|
||||
"P1": place in [from 0x30'0080 to 0x30'6fff] { ro };
|
||||
define block CSTACK with size = 4K, alignment = 8 { };
|
||||
define block SVC_STACK with size = 64, alignment = 8 { };
|
||||
define block IRQ_STACK with size = 64, alignment = 8 { };
|
||||
define block FIQ_STACK with size = 64, alignment = 8 { };
|
||||
define block UND_STACK with size = 64, alignment = 8 { };
|
||||
define block ABT_STACK with size = 64, alignment = 8 { };
|
||||
define block HEAP with size = 1K, alignment = 8 { };
|
||||
"P2": place in [from 0x30'7000 to 0x30'bfff] {
|
||||
rw, block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
|
||||
block UND_STACK, block ABT_STACK, block HEAP };
|
||||
|
||||
Section Kind Address Size Object
|
||||
------- ---- ------- ---- ------
|
||||
"A0": 0x40
|
||||
.intvec ro code 0x30'0000 0x40 Boot.o [1]
|
||||
- 0x30'0040 0x40
|
||||
|
||||
"P1": 0x243c
|
||||
.text ro code 0x30'0080 0xd18 SpiBooter.o [1]
|
||||
.text ro code 0x30'0d98 0x118 gpio.o [1]
|
||||
.text ro code 0x30'0eb0 0x8c timer.o [1]
|
||||
.text ro code 0x30'0f3c 0x1e8 UartPrint.o [1]
|
||||
.text ro code 0x30'1124 0x1a8 I32DivMod.o [3]
|
||||
.text ro code 0x30'12cc 0x4 IntDivZer.o [3]
|
||||
.text ro code 0x30'12d0 0x43c Entry.o [1]
|
||||
.text ro code 0x30'170c 0x40 sysinfo.o [1]
|
||||
.text ro code 0x30'174c 0x260 clockcfg.o [1]
|
||||
.text ro code 0x30'19ac 0x40 crc32.o [1]
|
||||
.rodata const 0x30'19ec 0x400 crc32.o [1]
|
||||
.text ro code 0x30'1dec 0x170 Boot.o [1]
|
||||
.rodata const 0x30'1f5c 0x138 SpiBooter.o [1]
|
||||
.text ro code 0x30'2094 0x78 exception.o [1]
|
||||
.text ro code 0x30'210c 0x3a zero_init3.o [3]
|
||||
.text ro code 0x30'2148 0x30 cmain.o [3]
|
||||
.text ro code 0x30'2178 0x4 low_level_init.o [2]
|
||||
.text ro code 0x30'217c 0x30 data_init.o [3]
|
||||
Veneer ro code 0x30'21ac 0x8 - Linker created -
|
||||
.text ro code 0x30'21b4 0x4 exit.o [2]
|
||||
.text ro code 0x30'21b8 0x14 exit.o [4]
|
||||
.text ro code 0x30'21cc 0x10 cexit.o [3]
|
||||
.rodata const 0x30'21dc 0x28 Entry.o [1]
|
||||
.rodata const 0x30'2204 0x24 Entry.o [1]
|
||||
.rodata const 0x30'2228 0x24 SpiBooter.o [1]
|
||||
.iar.init_table const 0x30'224c 0x10 - Linker created -
|
||||
.rodata const 0x30'225c 0x1c Entry.o [1]
|
||||
.rodata const 0x30'2278 0x18 Entry.o [1]
|
||||
.rodata const 0x30'2290 0x18 Entry.o [1]
|
||||
.rodata const 0x30'22a8 0x18 Entry.o [1]
|
||||
.rodata const 0x30'22c0 0x18 Entry.o [1]
|
||||
.rodata const 0x30'22d8 0x14 Entry.o [1]
|
||||
.rodata const 0x30'22ec 0x14 Entry.o [1]
|
||||
.rodata const 0x30'2300 0x14 exception.o [1]
|
||||
.rodata const 0x30'2314 0x10 exception.o [1]
|
||||
.rodata const 0x30'2324 0x10 SpiBooter.o [1]
|
||||
.rodata const 0x30'2334 0xc exception.o [1]
|
||||
.rodata const 0x30'2340 0xc exception.o [1]
|
||||
.rodata const 0x30'234c 0xc exception.o [1]
|
||||
.rodata const 0x30'2358 0xc exception.o [1]
|
||||
.rodata const 0x30'2364 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2370 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'237c 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2388 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2394 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23a0 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23ac 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23b8 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23c4 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23d0 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23dc 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23e8 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'23f4 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2400 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'240c 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2418 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2424 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2430 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'243c 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2448 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2454 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2460 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'246c 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2478 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2484 0xc SpiBooter.o [1]
|
||||
.rodata const 0x30'2490 0x8 SpiBooter.o [1]
|
||||
.rodata const 0x30'2498 0x8 SpiBooter.o [1]
|
||||
.rodata const 0x30'24a0 0x8 SpiBooter.o [1]
|
||||
.rodata const 0x30'24a8 0x8 SpiBooter.o [1]
|
||||
.rodata const 0x30'24b0 0x8 UartPrint.o [1]
|
||||
.text ro code 0x30'24b8 0x4 xreturnswi.o [4]
|
||||
.rodata const 0x30'24bc 0x0 zero_init3.o [3]
|
||||
- 0x30'24bc 0x243c
|
||||
|
||||
"P2", part 1 of 2: 0x15c
|
||||
.bss zero 0x30'7000 0x100 SpiBooter.o [1]
|
||||
.bss zero 0x30'7100 0x58 sysinfo.o [1]
|
||||
.bss zero 0x30'7158 0x4 SpiBooter.o [1]
|
||||
- 0x30'715c 0x15c
|
||||
|
||||
"P2", part 2 of 2: 0x1140
|
||||
CSTACK 0x30'7160 0x1000 <Block>
|
||||
CSTACK uninit 0x30'7160 0x1000 <Block tail>
|
||||
SVC_STACK 0x30'8160 0x40 <Block>
|
||||
SVC_STACK uninit 0x30'8160 0x40 <Block tail>
|
||||
IRQ_STACK 0x30'81a0 0x40 <Block>
|
||||
IRQ_STACK uninit 0x30'81a0 0x40 <Block tail>
|
||||
FIQ_STACK 0x30'81e0 0x40 <Block>
|
||||
FIQ_STACK uninit 0x30'81e0 0x40 <Block tail>
|
||||
UND_STACK 0x30'8220 0x40 <Block>
|
||||
UND_STACK uninit 0x30'8220 0x40 <Block tail>
|
||||
ABT_STACK 0x30'8260 0x40 <Block>
|
||||
ABT_STACK uninit 0x30'8260 0x40 <Block tail>
|
||||
- 0x30'82a0 0x1140
|
||||
|
||||
Unused ranges:
|
||||
|
||||
From To Size
|
||||
---- -- ----
|
||||
0x30'24bc 0x30'6fff 0x4b44
|
||||
0x30'715c 0x30'715f 0x4
|
||||
0x30'82a0 0x30'bfff 0x3d60
|
||||
|
||||
|
||||
*******************************************************************************
|
||||
*** INIT TABLE
|
||||
***
|
||||
|
||||
Address Size
|
||||
------- ----
|
||||
Zero (__iar_zero_init3)
|
||||
1 destination range, total size 0x15c:
|
||||
0x30'7000 0x15c
|
||||
|
||||
|
||||
|
||||
*******************************************************************************
|
||||
*** MODULE SUMMARY
|
||||
***
|
||||
|
||||
Module ro code ro data rw data
|
||||
------ ------- ------- -------
|
||||
command line/config:
|
||||
-------------------------------------------
|
||||
Total:
|
||||
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj: [1]
|
||||
Boot.o 432
|
||||
Entry.o 1 084 240
|
||||
SpiBooter.o 3 352 696 260
|
||||
UartPrint.o 488 8
|
||||
clockcfg.o 608
|
||||
crc32.o 64 1 024
|
||||
exception.o 120 84
|
||||
gpio.o 280
|
||||
sysinfo.o 64 88
|
||||
timer.o 140
|
||||
-------------------------------------------
|
||||
Total: 6 632 2 052 348
|
||||
|
||||
dl7Sx_tln.a: [2]
|
||||
exit.o 4
|
||||
low_level_init.o 4
|
||||
-------------------------------------------
|
||||
Total: 8
|
||||
|
||||
rt7Sx_tl.a: [3]
|
||||
I32DivMod.o 424
|
||||
IntDivZer.o 4
|
||||
cexit.o 16
|
||||
cmain.o 48
|
||||
data_init.o 48
|
||||
zero_init3.o 58
|
||||
-------------------------------------------
|
||||
Total: 598
|
||||
|
||||
sh7Sxs_l.a: [4]
|
||||
exit.o 20
|
||||
xreturnswi.o 4
|
||||
-------------------------------------------
|
||||
Total: 24
|
||||
|
||||
Gaps 2
|
||||
Linker created 8 16 4 416
|
||||
-----------------------------------------------
|
||||
Grand Total: 7 272 2 068 4 764
|
||||
|
||||
|
||||
*******************************************************************************
|
||||
*** ENTRY LIST
|
||||
***
|
||||
|
||||
Entry Address Size Type Object
|
||||
----- ------- ---- ---- ------
|
||||
.iar.init_table$$Base 0x30'224c -- Gb - Linker created -
|
||||
.iar.init_table$$Limit 0x30'225c -- Gb - Linker created -
|
||||
?main 0x30'2148 Code Gb cmain.o [3]
|
||||
ABT_STACK$$Base 0x30'8260 -- Gb - Linker created -
|
||||
ABT_STACK$$Limit 0x30'82a0 -- Gb - Linker created -
|
||||
CSTACK$$Base 0x30'7160 -- Gb - Linker created -
|
||||
CSTACK$$Limit 0x30'8160 -- Gb - Linker created -
|
||||
FIQ_STACK$$Base 0x30'81e0 -- Gb - Linker created -
|
||||
FIQ_STACK$$Limit 0x30'8220 -- Gb - Linker created -
|
||||
FlashBurn 0x30'0d60 0xc Code Gb SpiBooter.o [1]
|
||||
GPIO_MODREG 0x30'0df8 0x10 Code Lc gpio.o [1]
|
||||
GPIO_OFFSET 0x30'0db0 0x48 Code Lc gpio.o [1]
|
||||
GPIO_WDATAREG 0x30'0e08 0xc Code Lc gpio.o [1]
|
||||
GetSysInfo 0x30'170c 0x8 Code Gb sysinfo.o [1]
|
||||
HexToChar 0x30'0fb0 0x2c Code Lc UartPrint.o [1]
|
||||
IRQ_STACK$$Base 0x30'81a0 -- Gb - Linker created -
|
||||
IRQ_STACK$$Limit 0x30'81e0 -- Gb - Linker created -
|
||||
InitUart 0x30'0f3c 0x74 Code Gb UartPrint.o [1]
|
||||
IntToStr 0x30'1040 0x38 Code Gb UartPrint.o [1]
|
||||
PrintVariableValueHex 0x30'10d0 0x34 Code Gb UartPrint.o [1]
|
||||
Region$$Table$$Base 0x30'224c -- Gb - Linker created -
|
||||
Region$$Table$$Limit 0x30'225c -- Gb - Linker created -
|
||||
SVC_STACK$$Base 0x30'8160 -- Gb - Linker created -
|
||||
SVC_STACK$$Limit 0x30'81a0 -- Gb - Linker created -
|
||||
SaveSysInfo 0x30'1714 0x34 Code Gb sysinfo.o [1]
|
||||
SendUartString 0x30'1078 0x58 Code Gb UartPrint.o [1]
|
||||
SetCSGpioEnable 0x30'0080 0x28 Code Lc SpiBooter.o [1]
|
||||
SetCpuPLL 0x30'176c 0x50 Code Gb clockcfg.o [1]
|
||||
SetDDRPLL 0x30'180c 0x64 Code Gb clockcfg.o [1]
|
||||
SetGpuclk 0x30'1954 0x1c Code Gb clockcfg.o [1]
|
||||
SetMfcclk 0x30'1970 0x1c Code Gb clockcfg.o [1]
|
||||
SetSpiDataMode 0x30'00a8 0x4c Code Lc SpiBooter.o [1]
|
||||
SetSpiclk 0x30'1938 0x1c Code Gb clockcfg.o [1]
|
||||
SetSysPLL 0x30'17bc 0x50 Code Gb clockcfg.o [1]
|
||||
SetVPUPLL 0x30'1870 0x50 Code Gb clockcfg.o [1]
|
||||
SetXclkAHBclkAPBclk 0x30'18c0 0x78 Code Gb clockcfg.o [1]
|
||||
ShortToStr 0x30'0fdc 0x64 Code Lc UartPrint.o [1]
|
||||
SpiDisable4ByteMode 0x30'0220 0x48 Code Lc SpiBooter.o [1]
|
||||
SpiEmptyRxFIFO 0x30'0114 0x24 Code Lc SpiBooter.o [1]
|
||||
SpiEnable4ByteMode 0x30'0268 0x48 Code Lc SpiBooter.o [1]
|
||||
SpiEraseBlock 0x30'086c 0xbc Code Lc SpiBooter.o [1]
|
||||
SpiEraseSector 0x30'07b0 0xbc Code Lc SpiBooter.o [1]
|
||||
SpiInit 0x30'061c 0x144 Code Gb SpiBooter.o [1]
|
||||
SpiNorBurn 0x30'0b4c 0x214 Code Lc SpiBooter.o [1]
|
||||
SpiNorBurnPage 0x30'0a64 0xb0 Code Lc SpiBooter.o [1]
|
||||
SpiReadJedecId 0x30'0580 0x9c Code Lc SpiBooter.o [1]
|
||||
SpiReadPage 0x30'02b0 0x1ec Code Lc SpiBooter.o [1]
|
||||
SpiReadSta 0x30'01b4 0x6c Code Lc SpiBooter.o [1]
|
||||
SpiReadSta3 0x30'0138 0x7c Code Lc SpiBooter.o [1]
|
||||
SpiSelectPad 0x30'049c 0x48 Code Gb SpiBooter.o [1]
|
||||
SpiWaitIdle 0x30'00f4 0x20 Code Lc SpiBooter.o [1]
|
||||
SpiWriteEnable 0x30'0760 0x50 Code Lc SpiBooter.o [1]
|
||||
SpiWritePage 0x30'0928 0x13c Code Lc SpiBooter.o [1]
|
||||
SpiWriteSysInfo 0x30'0d6c 0x2c Code Gb SpiBooter.o [1]
|
||||
SwitchTo24MHz 0x30'198c 0x20 Code Gb clockcfg.o [1]
|
||||
UND_STACK$$Base 0x30'8220 -- Gb - Linker created -
|
||||
UND_STACK$$Limit 0x30'8260 -- Gb - Linker created -
|
||||
__aeabi_idiv 0x30'1124 Code Gb I32DivMod.o [3]
|
||||
__aeabi_idiv0 0x30'12cc Code Gb IntDivZer.o [3]
|
||||
__aeabi_idivmod 0x30'1124 Code Gb I32DivMod.o [3]
|
||||
__aeabi_uidiv 0x30'1150 Code Gb I32DivMod.o [3]
|
||||
__aeabi_uidivmod 0x30'1150 Code Gb I32DivMod.o [3]
|
||||
__cmain 0x30'2148 Code Gb cmain.o [3]
|
||||
__exit 0x30'21b9 0x14 Code Gb exit.o [4]
|
||||
__iar_data_init3 0x30'217d 0x30 Code Gb data_init.o [3]
|
||||
__iar_program_start 0x30'1dec Code Gb Boot.o [1]
|
||||
__iar_return_from_swi 0x30'24b8 0x4 Code Gb xreturnswi.o [4]
|
||||
__iar_zero_init3 0x30'210d 0x3a Code Gb zero_init3.o [3]
|
||||
__low_level_init 0x30'2179 0x4 Code Gb low_level_init.o [2]
|
||||
__vector 0x30'0000 Code Gb Boot.o [1]
|
||||
_call_main 0x30'2160 Code Gb cmain.o [3]
|
||||
_exit 0x30'21cc Code Gb cexit.o [3]
|
||||
_main 0x30'2168 Code Gb cmain.o [3]
|
||||
addr_in_4_byte 0x30'7158 0x4 Data Lc SpiBooter.o [1]
|
||||
crc32_table 0x30'19ec 0x400 Data Lc crc32.o [1]
|
||||
data_abort_handler 0x30'20b4 0x10 Code Gb exception.o [1]
|
||||
ddr3_sdramc_init 0x30'1304 0x19c Code Gb Entry.o [1]
|
||||
ddr_training_one 0x30'12d0 0x34 Code Gb Entry.o [1]
|
||||
delay 0x30'174c 0x20 Code Lc clockcfg.o [1]
|
||||
dwspi_jedec252_reset 0x30'04e4 0x9c Code Lc SpiBooter.o [1]
|
||||
exit 0x30'21b5 0x4 Code Gb exit.o [2]
|
||||
fiq_handler 0x30'20d4 0x10 Code Gb exception.o [1]
|
||||
flash_chip_table 0x30'1f5c 0x138 Data Lc SpiBooter.o [1]
|
||||
gpio_direction_output 0x30'0e14 0x9c Code Gb gpio.o [1]
|
||||
gpio_get_regbase 0x30'0d98 0x18 Code Lc gpio.o [1]
|
||||
irq_handler 0x30'20c4 0x10 Code Gb exception.o [1]
|
||||
main 0x30'156c 0x11c Code Gb Entry.o [1]
|
||||
mdelay 0x30'0f28 0x14 Code Gb timer.o [1]
|
||||
pagecheck 0x30'7000 0x100 Data Lc SpiBooter.o [1]
|
||||
prefetch_handler 0x30'20a4 0x10 Code Gb exception.o [1]
|
||||
swi_handler 0x30'20e4 0x10 Code Gb exception.o [1]
|
||||
sysinfo 0x30'7100 0x58 Data Lc sysinfo.o [1]
|
||||
timer_init 0x30'0eb0 0x2c Code Gb timer.o [1]
|
||||
udelay 0x30'0edc 0x4c Code Gb timer.o [1]
|
||||
undef_handler 0x30'2094 0x10 Code Gb exception.o [1]
|
||||
updateFromJtag 0x30'14a0 0xcc Code Gb Entry.o [1]
|
||||
xcrc32 0x30'19ac 0x40 Code Gb crc32.o [1]
|
||||
|
||||
|
||||
[1] = G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj
|
||||
[2] = dl7Sx_tln.a
|
||||
[3] = rt7Sx_tl.a
|
||||
[4] = sh7Sxs_l.a
|
||||
|
||||
7 272 bytes of readonly code memory
|
||||
2 068 bytes of readonly data memory
|
||||
4 764 bytes of readwrite data memory
|
||||
|
||||
Errors: none
|
||||
Warnings: none
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbd
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbd
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbd.browse
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbd.browse
Normal file
Binary file not shown.
17
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbd.linf
Normal file
17
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbd.linf
Normal file
@ -0,0 +1,17 @@
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\AMTLDR.pbd
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\diskio.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\ff.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\clockcfg.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\crc32.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\Entry.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\exception.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\gpio.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\mmu.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\sdmmc.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\SpiBooter.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\SpinandBooter.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\sysinfo.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\timer.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\UartPrint.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\wdt.pbi
|
||||
G:\mengxun\A58-AMTLDR\AMT630Hv100\Obj\cp15.pbi
|
||||
36086
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbw
Normal file
36086
A58-AMTLDR/AMT630Hv100/Obj/AMTLDR.pbw
Normal file
File diff suppressed because it is too large
Load Diff
BIN
A58-AMTLDR/AMT630Hv100/Obj/Boot.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/Boot.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/Entry.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/Entry.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/Entry.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/Entry.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/Entry.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/Entry.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\Entry.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpiBooter.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpiBooter.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpiBooter.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpiBooter.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/SpiBooter.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/SpiBooter.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\SpiBooter.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpinandBooter.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpinandBooter.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpinandBooter.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/SpinandBooter.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/SpinandBooter.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/SpinandBooter.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\SpinandBooter.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/UartPrint.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/UartPrint.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/UartPrint.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/UartPrint.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/UartPrint.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/UartPrint.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\UartPrint.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/clockcfg.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/clockcfg.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/clockcfg.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/clockcfg.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/clockcfg.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/clockcfg.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\clockcfg.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/cp15.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/cp15.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/cp15.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/cp15.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/cp15.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/cp15.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\cp15.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/cp15_asm_iar.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/cp15_asm_iar.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/crc32.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/crc32.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/crc32.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/crc32.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/crc32.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/crc32.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\crc32.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/diskio.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/diskio.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/diskio.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/diskio.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/diskio.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/diskio.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\fs\diskio.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src\fs
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/exception.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/exception.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/exception.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/exception.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/exception.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/exception.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\exception.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/ff.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/ff.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/ff.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/ff.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/ff.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/ff.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\fs\ff.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src\fs
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/gpio.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/gpio.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/gpio.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/gpio.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/gpio.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/gpio.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\gpio.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/mmu.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/mmu.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/mmu.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/mmu.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/mmu.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/mmu.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\mmu.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/sdmmc.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/sdmmc.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/sdmmc.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/sdmmc.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/sdmmc.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/sdmmc.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\sdmmc.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/sysinfo.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/sysinfo.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/sysinfo.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/sysinfo.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/sysinfo.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/sysinfo.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\sysinfo.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/timer.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/timer.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/timer.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/timer.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/timer.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/timer.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\timer.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
BIN
A58-AMTLDR/AMT630Hv100/Obj/wdt.o
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/wdt.o
Normal file
Binary file not shown.
BIN
A58-AMTLDR/AMT630Hv100/Obj/wdt.pbi
Normal file
BIN
A58-AMTLDR/AMT630Hv100/Obj/wdt.pbi
Normal file
Binary file not shown.
329
A58-AMTLDR/AMT630Hv100/Obj/wdt.pbi.xcl
Normal file
329
A58-AMTLDR/AMT630Hv100/Obj/wdt.pbi.xcl
Normal file
@ -0,0 +1,329 @@
|
||||
"G:\mengxun\A58-AMTLDR\Src\wdt.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-I
|
||||
G:\mengxun\A58-AMTLDR\Src
|
||||
-I
|
||||
E:\IAR\arm\inc
|
||||
-I
|
||||
E:\IAR\arm\inc\c
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__ATOMIC_BOOL_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR16_T_LOCK_FREE=2
|
||||
-D__ATOMIC_CHAR32_T_LOCK_FREE=2
|
||||
-D__ATOMIC_WCHAR_T_LOCK_FREE=2
|
||||
-D__ATOMIC_SHORT_LOCK_FREE=2
|
||||
-D__ATOMIC_INT_LOCK_FREE=2
|
||||
-D__ATOMIC_LONG_LOCK_FREE=2
|
||||
-D__ATOMIC_LLONG_LOCK_FREE=2
|
||||
-D__ATOMIC_POINTER_LOCK_FREE=2
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=1
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf90
|
||||
-D__VER__=8030001
|
||||
-D__BUILD_NUMBER__=114
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5E__=5
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6MEDIA__=6
|
||||
-D__ARM6T2__=6
|
||||
-D__ARM6__=6
|
||||
-D__ARM7A__=7
|
||||
-D__ARM7__=7
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=7
|
||||
-D__ARM_ARCH_ISA_ARM=1
|
||||
-D__ARM_ARCH_ISA_THUMB=2
|
||||
-D__ARM_ARCH_PROFILE='A'
|
||||
-D__ARM_FEATURE_CLZ=1
|
||||
-D__ARM_FEATURE_COPROC=15
|
||||
-D__ARM_FEATURE_DSP=1
|
||||
-D__ARM_FEATURE_LDREX=15
|
||||
-D__ARM_FEATURE_QBIT=1
|
||||
-D__ARM_FEATURE_SAT=1
|
||||
-D__ARM_FEATURE_SIMD32=1
|
||||
-D__ARM_FEATURE_UNALIGNED=1
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_MEDIA__=1
|
||||
-D__ARM_MPCORE__=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM7A__
|
||||
-D__CPU_MODE__=2
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656388
|
||||
-D__IAR_COMPILERBASE_STR__=10.4.4.1056
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201112L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__MEMORY_ORDER_RELAXED__=0
|
||||
-D__MEMORY_ORDER_CONSUME__=1
|
||||
-D__MEMORY_ORDER_ACQUIRE__=2
|
||||
-D__MEMORY_ORDER_RELEASE__=3
|
||||
-D__MEMORY_ORDER_ACQ_REL__=4
|
||||
-D__MEMORY_ORDER_SEQ_CST__=5
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603
|
||||
-D__cpp_unicode_literals=200710
|
||||
-D__cpp_static_assert=200410
|
||||
-D__EDG_TYPE_TRAITS_ENABLED=1
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=414
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="E:\\IAR\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.30.1.114/W32 for ARM"
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
517
A58-AMTLDR/AMTLDR.dep
Normal file
517
A58-AMTLDR/AMTLDR.dep
Normal file
@ -0,0 +1,517 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<project>
|
||||
<fileVersion>4</fileVersion>
|
||||
<fileChecksum>3771691642</fileChecksum>
|
||||
<configuration>
|
||||
<name>AMT630Hv100</name>
|
||||
<outputs>
|
||||
<file>$PROJ_DIR$\Src\fs\ff.h</file>
|
||||
<file>$PROJ_DIR$\Src\fs\ff.c</file>
|
||||
<file>$PROJ_DIR$\Src\amt630h.h</file>
|
||||
<file>$PROJ_DIR$\Src\Boot.s</file>
|
||||
<file>$PROJ_DIR$\Src\fs\diskio.h</file>
|
||||
<file>$PROJ_DIR$\Src\fs\integer.h</file>
|
||||
<file>$PROJ_DIR$\Src\fs\diskio.c</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\iccarm_builtin.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\sysinfo.pbi</file>
|
||||
<file>$PROJ_DIR$\Src\spi.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\crc32.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\cp15.o</file>
|
||||
<file>$PROJ_DIR$\Src\scsi.h</file>
|
||||
<file>$PROJ_DIR$\Src\timer.h</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</file>
|
||||
<file>$PROJ_DIR$\Src\crc32.c</file>
|
||||
<file>$PROJ_DIR$\Src\Entry.c</file>
|
||||
<file>$PROJ_DIR$\Src\SpiBooter.c</file>
|
||||
<file>$PROJ_DIR$\Src\sysinfo.c</file>
|
||||
<file>$PROJ_DIR$\Src\SpinandBooter.c</file>
|
||||
<file>$PROJ_DIR$\Src\timer.c</file>
|
||||
<file>$PROJ_DIR$\Src\typedef.h</file>
|
||||
<file>$PROJ_DIR$\Src\wdt.c</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\AMTLDR.pbd</file>
|
||||
<file>$PROJ_DIR$\Src\exception.c</file>
|
||||
<file>$PROJ_DIR$\Src\BootModeSel.h</file>
|
||||
<file>$PROJ_DIR$\Src\mmu.c</file>
|
||||
<file>$PROJ_DIR$\Src\sysinfo.h</file>
|
||||
<file>$PROJ_DIR$\Src\UartPrint.c</file>
|
||||
<file>$PROJ_DIR$\Src\cp15_asm_iar.s</file>
|
||||
<file>$PROJ_DIR$\Src\clockcfg.c</file>
|
||||
<file>$PROJ_DIR$\Src\list.h</file>
|
||||
<file>$PROJ_DIR$\Src\sdmmc.c</file>
|
||||
<file>$PROJ_DIR$\Src\sdmmc.h</file>
|
||||
<file>$PROJ_DIR$\Src\cp15.c</file>
|
||||
<file>$PROJ_DIR$\Src\gpio.c</file>
|
||||
<file>$PROJ_DIR$\Src\crc32.h</file>
|
||||
<file>$PROJ_DIR$\Src\UartPrint.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\cp15.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\timer.pbi</file>
|
||||
<file>$TOOLKIT_DIR$\lib\dl7Sx_tln.a</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\ff.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\wdt.pbi</file>
|
||||
<file>$PROJ_DIR$\AMTLDR.icf</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\gpio.o</file>
|
||||
<file>$PROJ_DIR$\Src\cp15.h</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\stdint.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\sdmmc.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\DLib_Product_stdlib.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\SpinandBooter.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\Boot.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\diskio.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\clockcfg.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\clockcfg.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\yvals.h</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\stdlib.h</file>
|
||||
<file>$TOOLKIT_DIR$\lib\rt7Sx_tl.a</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\exception.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\timer.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\ff.pbi</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\DLib_Product.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\cp15_asm_iar.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\ysizet.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Exe\AMTLDR.bin</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\mmu.pbi</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\ycheck.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\List\AMTLDR.map</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\diskio.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\SpiBooter.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\intrinsics.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\UartPrint.pbi</file>
|
||||
<file>$TOOLKIT_DIR$\lib\m7Sx_tl.a</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\crc32.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\Entry.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Exe\AMTLDR.out</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\sdmmc.pbi</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\DLib_Product_string.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\Entry.o</file>
|
||||
<file>$PROJ_DIR$\Src\gpio.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\SpiBooter.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\UartPrint.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\mmu.o</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\exception.pbi</file>
|
||||
<file>$TOOLKIT_DIR$\lib\sh7Sxs_l.a</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\wdt.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\string.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\SpinandBooter.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\iar_intrinsics_common.h</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\gpio.pbi</file>
|
||||
<file>$PROJ_DIR$\AMT630Hv100\Obj\sysinfo.o</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\stdio.h</file>
|
||||
<file>$PROJ_DIR$\Src\mmu.h</file>
|
||||
<file>$TOOLKIT_DIR$\inc\c\DLib_Defaults.h</file>
|
||||
</outputs>
|
||||
<file>
|
||||
<name>[ROOT_NODE]</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ILINK</name>
|
||||
<file> 74 66</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\fs\ff.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 41</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 59</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 85 65 54 92 14 60 62 76 0 5 4</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 65 76 14 4 62 0 54 60 85 92 5</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\Boot.s</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>AARM</name>
|
||||
<file> 50</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\fs\diskio.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 67</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 51</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 4 5</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 4 5</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\crc32.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 72</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 10</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 90 65 54 92 14 60 62 55 48</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 92 54 65 60 62 55 14 90 48</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\Entry.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 77</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 73</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 21 2 25 37 13 91 45 46 65 54 92 14 60 27 9</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 13 21 92 25 27 54 2 37 91 9 45 46 65 14 60</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\SpiBooter.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 68</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 79</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 85 65 54 92 14 60 62 76 21 2 37 13 9 45 46 27 36 78</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 36 13 62 60 21 2 45 65 76 14 37 9 27 78 54 92 46 85</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\sysinfo.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 89</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 8</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2 27 36</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 36 27 2</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\SpinandBooter.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 86</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 49</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 90 65 54 92 14 60 62 85 76 21 2 37 13 9 45 46 27 36 78</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 62 27 60 37 65 21 9 78 14 76 85 2 13 45 36 54 92 46 90</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\timer.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 58</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 39</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2 13 21</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 21 13 2</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\wdt.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 84</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 42</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2 37</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 37 2</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\exception.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 57</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 82</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 37</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 37</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\mmu.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 81</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 64</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 91 45 46 65 54 92 14 60</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 45 14 46 65 60 54 92 91</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\UartPrint.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 80</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 70</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2 21 37</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 37 21 2</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\cp15_asm_iar.s</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>AARM</name>
|
||||
<file> 61</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\clockcfg.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 53</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 52</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\sdmmc.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 47</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 75</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 85 65 54 92 14 60 62 76 21 2 33 37 13 0 5 4 36 27</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 36 37 62 60 2 0 65 21 33 13 4 27 76 14 5 85 54 92</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\cp15.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 11</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 38</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 45 46 65 54 92 14 60 37 69 7 87</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 14 7 65 60 37 69 46 54 92 87 45</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Src\gpio.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 44</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 88</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\AMT630Hv100\Exe\AMTLDR.out</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ILINK</name>
|
||||
<file> 66</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>OBJCOPY</name>
|
||||
<file> 63</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ILINK</name>
|
||||
<file> 43 50 53 11 61 72 67 77 57 41 44 81 47 68 86 89 58 80 84 83 56 71 40</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
</configuration>
|
||||
</project>
|
||||
1476
A58-AMTLDR/AMTLDR.ewd
Normal file
1476
A58-AMTLDR/AMTLDR.ewd
Normal file
File diff suppressed because it is too large
Load Diff
1136
A58-AMTLDR/AMTLDR.ewp
Normal file
1136
A58-AMTLDR/AMTLDR.ewp
Normal file
File diff suppressed because it is too large
Load Diff
10
A58-AMTLDR/AMTLDR.eww
Normal file
10
A58-AMTLDR/AMTLDR.eww
Normal file
@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\AMTLDR.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
43
A58-AMTLDR/AMTLDR.icf
Normal file
43
A58-AMTLDR/AMTLDR.icf
Normal file
@ -0,0 +1,43 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x300000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x300080;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x306fff;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x307000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x30bfff;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_svcstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_irqstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_fiqstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_undstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_abtstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x400;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
|
||||
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
|
||||
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
|
||||
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
|
||||
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
|
||||
block UND_STACK, block ABT_STACK, block HEAP };
|
||||
43
A58-AMTLDR/EMMCLDR.icf
Normal file
43
A58-AMTLDR/EMMCLDR.icf
Normal file
@ -0,0 +1,43 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x30c000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x30c080;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x30ffff;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x310000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x313fff;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_svcstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_irqstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_fiqstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_undstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_abtstack__ = 0x40;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x400;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
|
||||
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
|
||||
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
|
||||
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
|
||||
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
|
||||
block UND_STACK, block ABT_STACK, block HEAP };
|
||||
239
A58-AMTLDR/Src/Boot.s
Normal file
239
A58-AMTLDR/Src/Boot.s
Normal file
@ -0,0 +1,239 @@
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION IRQ_STACK:DATA:NOROOT(3)
|
||||
SECTION FIQ_STACK:DATA:NOROOT(3)
|
||||
SECTION SVC_STACK:DATA:NOROOT(3)
|
||||
SECTION ABT_STACK:DATA:NOROOT(3)
|
||||
SECTION UND_STACK:DATA:NOROOT(3)
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#define __ASSEMBLY__
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Definitions
|
||||
//------------------------------------------------------------------------------
|
||||
#define IRAM_BASE 0x300000
|
||||
#define SYS_CPU_CTL 0xe4900208
|
||||
#define AIC 0xFFFFF000
|
||||
#define AIC_IVR 0x10
|
||||
#define AIC_EOICR 0x38
|
||||
|
||||
#define ARM_MODE_ABT 0x17
|
||||
#define ARM_MODE_FIQ 0x11
|
||||
#define ARM_MODE_IRQ 0x12
|
||||
#define ARM_MODE_SVC 0x13
|
||||
#define ARM_MODE_SYS 0x1F
|
||||
|
||||
#define I_BIT 0x80
|
||||
#define F_BIT 0x40
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Startup routine
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/*
|
||||
Exception vectors
|
||||
*/
|
||||
// SECTION .vectors:CODE:NOROOT(2)
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
PUBLIC __vector
|
||||
PUBLIC __iar_program_start
|
||||
|
||||
ARM ; Always ARM mode after reset
|
||||
|
||||
__vector:
|
||||
ldr pc, Reset
|
||||
DCD 0x424b5244
|
||||
//LDR PC, Undefined_Addr
|
||||
LDR PC, SWI_Addr
|
||||
LDR PC, Prefetch_Addr
|
||||
LDR PC, Abort_Addr
|
||||
NOP ; Reserved vector
|
||||
LDR PC, IRQ_Addr
|
||||
LDR PC, FIQ_Addr
|
||||
|
||||
IMPORT undef_handler
|
||||
IMPORT swi_handler
|
||||
IMPORT prefetch_handler
|
||||
IMPORT data_abort_handler
|
||||
IMPORT irq_handler
|
||||
IMPORT fiq_handler
|
||||
|
||||
Reset: dc32 __iar_program_start
|
||||
Undefined_Addr: dc32 undef_handler ;Undefined_Handler
|
||||
SWI_Addr: dc32 swi_handler ;SWI_Handler
|
||||
Prefetch_Addr: dc32 prefetch_handler ;ExceptionPAB
|
||||
Abort_Addr: dc32 data_abort_handler ;ExceptionDAB
|
||||
Reserved_Addr: dc32 0 ;ExceptionREV
|
||||
IRQ_Addr: dc32 irq_handler
|
||||
FIQ_Addr: dc32 fiq_handler
|
||||
|
||||
MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR
|
||||
|
||||
USR_MODE DEFINE 0x10 ; User mode
|
||||
FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
|
||||
IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
|
||||
SVC_MODE DEFINE 0x13 ; Supervisor mode
|
||||
ABT_MODE DEFINE 0x17 ; Abort mode
|
||||
UND_MODE DEFINE 0x1B ; Undefined Instruction mode
|
||||
SYS_MODE DEFINE 0x1F ; System mode
|
||||
|
||||
CP_DIS_MASK DEFINE 0xFFFFEFFA
|
||||
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
EXTERN ?main
|
||||
REQUIRE __vector
|
||||
|
||||
__iar_program_start:
|
||||
b reset_handler
|
||||
// DCD 0x424b5241
|
||||
// DCD 0
|
||||
// DCD 0
|
||||
|
||||
reset_handler:
|
||||
;==================================================================
|
||||
; Reset registers
|
||||
;==================================================================
|
||||
MOV r2, #0
|
||||
MOV r3, #0
|
||||
MOV r4, #0
|
||||
MOV r5, #0
|
||||
MOV r6, #0
|
||||
MOV r7, #0
|
||||
MOV r8, #0
|
||||
MOV r9, #0
|
||||
MOV r10, #0
|
||||
MOV r11, #0
|
||||
MOV r12, #0
|
||||
|
||||
;==================================================================
|
||||
; Disable caches, MMU and branch prediction in case they were left enabled from an earlier run
|
||||
; This does not need to be done from a cold reset
|
||||
;==================================================================
|
||||
MRC p15, 0, r0, c1, c0, 0 ; Read CP15 System Control register
|
||||
BIC r0, r0, #(0x1 << 12) ; Clear I bit 12 to disable I Cache
|
||||
;ORR r0, r0, #(0x1 << 12) ; Set I bit 12 to enable I Cache
|
||||
BIC r0, r0, #(0x1 << 2) ; Clear C bit 2 to disable D Cache
|
||||
BIC r0, r0, #0x1 ; Clear M bit 0 to disable MMU
|
||||
BIC r0, r0, #(0x1 << 11) ; Clear Z bit 11 to disable branch prediction
|
||||
MCR p15, 0, r0, c1, c0, 0 ; Write value back to CP15 System Control register
|
||||
|
||||
;==================================================================
|
||||
; Cache Invalidation code for Cortex-A7
|
||||
; NOTE: Neither Caches, nor MMU, nor BTB need post-reset invalidation on Cortex-A7,
|
||||
; but forcing a cache invalidation, makes the code more portable to other CPUs (e.g. Cortex-A9)
|
||||
;==================================================================
|
||||
; Invalidate L1 Instruction Cache
|
||||
MRC p15, 1, r0, c0, c0, 1 ; Read Cache Level ID Register (CLIDR)
|
||||
TST r0, #0x3 ; Harvard Cache?
|
||||
MOV r0, #0 ; SBZ
|
||||
MCRNE p15, 0, r0, c7, c5, 0 ; ICIALLU - Invalidate instruction cache and flush branch target cache
|
||||
|
||||
; Invalidate Data/Unified Caches
|
||||
|
||||
MRC p15, 1, r0, c0, c0, 1 ; Read CLIDR
|
||||
ANDS r3, r0, #0x07000000 ; Extract coherency level
|
||||
MOV r3, r3, LSR #23 ; Total cache levels << 1
|
||||
BEQ Finished ; If 0, no need to clean
|
||||
|
||||
MOV r10, #0 ; R10 holds current cache level << 1
|
||||
Loop1 ADD r2, r10, r10, LSR #1 ; R2 holds cache "Set" position
|
||||
MOV r1, r0, LSR r2 ; Bottom 3 bits are the Cache-type for this level
|
||||
AND r1, r1, #7 ; Isolate those lower 3 bits
|
||||
CMP r1, #2
|
||||
BLT Skip ; No cache or only instruction cache at this level
|
||||
|
||||
MCR p15, 2, r10, c0, c0, 0 ; Write the Cache Size selection register
|
||||
ISB ; ISB to sync the change to the CacheSizeID reg
|
||||
MRC p15, 1, r1, c0, c0, 0 ; Reads current Cache Size ID register
|
||||
AND r2, r1, #7 ; Extract the line length field
|
||||
ADD r2, r2, #4 ; Add 4 for the line length offset (log2 16 bytes)
|
||||
LDR r4, =0x3FF
|
||||
ANDS r4, r4, r1, LSR #3 ; R4 is the max number on the way size (right aligned)
|
||||
CLZ r5, r4 ; R5 is the bit position of the way size increment
|
||||
LDR r7, =0x7FFF
|
||||
ANDS r7, r7, r1, LSR #13 ; R7 is the max number of the index size (right aligned)
|
||||
|
||||
Loop2 MOV r9, r4 ; R9 working copy of the max way size (right aligned)
|
||||
|
||||
Loop3 ORR r11, r10, r9, LSL r5 ; Factor in the Way number and cache number into R11
|
||||
ORR r11, r11, r7, LSL r2 ; Factor in the Set number
|
||||
MCR p15, 0, r11, c7, c6, 2 ; Invalidate by Set/Way
|
||||
SUBS r9, r9, #1 ; Decrement the Way number
|
||||
BGE Loop3
|
||||
SUBS r7, r7, #1 ; Decrement the Set number
|
||||
BGE Loop2
|
||||
Skip ADD r10, r10, #2 ; increment the cache number
|
||||
CMP r3, r10
|
||||
BGT Loop1
|
||||
|
||||
Finished
|
||||
|
||||
;==================================================================
|
||||
; Invalidate TLB
|
||||
;==================================================================
|
||||
MOV r0, #0
|
||||
MCR p15, 0, r0, c8, c7, 0
|
||||
|
||||
;==================================================================
|
||||
; Branch Prediction Enable
|
||||
;==================================================================
|
||||
;MOV r1, #0
|
||||
;MRC p15, 0, r1, c1, c0, 0 /* Read Control Register configuration data */
|
||||
;ORR r1, r1, #(0x1 << 11) /* Global BP Enable bit */
|
||||
;MCR p15, 0, r1, c1, c0, 0 /* Write Control Register configuration data */
|
||||
|
||||
; Initialize the stack pointers.
|
||||
; The pattern below can be used for any of the exception stacks:
|
||||
; FIQ, IRQ, SVC, ABT, UND, SYS.
|
||||
; The USR mode uses the same stack as SYS.
|
||||
; The stack segments must be defined in the linker command file,
|
||||
; and be declared above.
|
||||
mrs r0,cpsr ; Original PSR value
|
||||
bic r0,r0,#MODE_MSK ; Clear the mode bits
|
||||
orr r0,r0,#SVC_MODE ; Set Supervisor mode bits
|
||||
msr cpsr_c,r0 ; Change the mode
|
||||
ldr sp,=SFE(SVC_STACK) ; End of SVC_STACK
|
||||
|
||||
bic r0,r0,#MODE_MSK ; Clear the mode bits
|
||||
orr r0,r0,#ABT_MODE ; Set Abort mode bits
|
||||
msr cpsr_c,r0 ; Change the mode
|
||||
ldr sp,=SFE(ABT_STACK) ; End of ABT_STACK
|
||||
|
||||
bic r0,r0,#MODE_MSK ; Clear the mode bits
|
||||
orr r0,r0,#UND_MODE ; Set Undefined mode bits
|
||||
msr cpsr_c,r0 ; Change the mode
|
||||
ldr sp,=SFE(UND_STACK) ; End of UND_STACK
|
||||
|
||||
bic r0,r0,#MODE_MSK ; Clear the mode bits
|
||||
orr r0,r0,#FIQ_MODE ; Set FIR mode bits
|
||||
msr cpsr_c,r0 ; Change the mode
|
||||
ldr sp,=SFE(FIQ_STACK) ; End of FIQ_STACK
|
||||
|
||||
bic r0,r0,#MODE_MSK ; Clear the mode bits
|
||||
orr r0,r0,#IRQ_MODE ; Set IRQ mode bits
|
||||
msr cpsr_c,r0 ; Change the mode
|
||||
ldr sp,=SFE(IRQ_STACK) ; End of IRQ_STACK
|
||||
|
||||
bic r0,r0,#MODE_MSK ; Clear the mode bits
|
||||
orr r0,r0,#SYS_MODE ; Set System mode bits
|
||||
msr cpsr_c,r0 ; Change the mode
|
||||
ldr sp,=SFE(CSTACK) ; End of CSTACK
|
||||
|
||||
/* Branch to main() */
|
||||
LDR r0, =?main
|
||||
BLX r0
|
||||
|
||||
/* Loop indefinitely when program is finished */
|
||||
loop4:
|
||||
B loop4
|
||||
|
||||
|
||||
END
|
||||
|
||||
14
A58-AMTLDR/Src/BootModeSel.h
Normal file
14
A58-AMTLDR/Src/BootModeSel.h
Normal file
@ -0,0 +1,14 @@
|
||||
#ifndef BOOT_MODE_SEL_H__
|
||||
#define BOOT_MODE_SEL_H__
|
||||
|
||||
void bootFromSPI(void);
|
||||
void bootFromNand(void);
|
||||
void bootFromUsbHost();
|
||||
void bootFromUsbDevice(int highspeed);
|
||||
void bootFromUart(void);
|
||||
void bootFromSD(int chipid, int bcheckfile);
|
||||
void bootFromEMMC(int chipid);
|
||||
void bootFromSpinand(void);
|
||||
|
||||
#endif
|
||||
|
||||
61
A58-AMTLDR/Src/CommonDef.inc
Normal file
61
A58-AMTLDR/Src/CommonDef.inc
Normal file
@ -0,0 +1,61 @@
|
||||
//#define VECTOR_ENABLE TRUE
|
||||
#define VECTOR_ENABLE FALSE
|
||||
|
||||
;Pre-defined run mode constants
|
||||
USERMODE EQU 0x10
|
||||
FIQMODE EQU 0x11
|
||||
IRQMODE EQU 0x12
|
||||
SVCMODE EQU 0x13
|
||||
ABORTMODE EQU 0x17
|
||||
UNDEFMODE EQU 0x1b
|
||||
MODEMASK EQU 0x1f
|
||||
NOINT EQU 0xc0
|
||||
|
||||
|
||||
;Stacks defination for each run mode
|
||||
_STACK_BASEADDRESS EQU 0xC0008000
|
||||
|
||||
UserStackLen EQU 0x10
|
||||
SVCStackLen EQU 0x2000
|
||||
UndefStackLen EQU 0x10
|
||||
AbortStackLen EQU 0x10
|
||||
IRQStackLen EQU 0x400
|
||||
FIQStackLen EQU 0x10
|
||||
|
||||
UserStackStart EQU (_STACK_BASEADDRESS)
|
||||
UndefStackStart EQU (UserStackStart - UserStackLen)
|
||||
AbortStackStart EQU (UndefStackStart - UndefStackLen)
|
||||
IRQStackStart EQU (AbortStackStart - AbortStackLen)
|
||||
FIQStackStart EQU (IRQStackStart - IRQStackLen)
|
||||
SVCStackStart EQU (FIQStackStart - FIQStackLen)
|
||||
|
||||
|
||||
VICL_BASE EQU 0xE0C00000
|
||||
VICH_BASE EQU 0xE0B00000
|
||||
ENABLE_REG_OFFSET EQU 0x10
|
||||
CLR_REG_OFFSET EQU 0x14
|
||||
ADDRESS_REG_OFFSET EQU 0xF00
|
||||
VICL_RAW_STATUS EQU 0xE0C00008 ;Interrupt raw status low 32 vector
|
||||
VICH_RAW_STATUS EQU 0xE0B00008 ;Interrupt raw status high 32 vector
|
||||
VICL_SEL_REG EQU 0xE0C0000C ;Interrupt select reg for low 32 vector
|
||||
VICH_SEL_REG EQU 0xE0B0000C ;Interrupt select reg for high 32 vector
|
||||
VICL_ENABLE EQU 0xE0C00010 ;Interrupt Enable control low 32 vector
|
||||
VICH_ENABLE EQU 0xE0B00010 ;Interrupt Enable control high 32 vector
|
||||
VICL_CLR EQU 0xE0C00014 ;Interrupt clear control low 32 vector
|
||||
VICH_CLR EQU 0xE0B00014 ;Interrupt clear control high 32 vector
|
||||
VICL_ADDR_BASE EQU 0xE0C00100
|
||||
VICH_ADDR_BASE EQU 0xE0B00100
|
||||
VICL_PROORITY_BASE EQU 0xE0C00200
|
||||
VICH_PROORITY_BASE EQU 0xE0B00200
|
||||
|
||||
;ENABLE_VE EQU 0x01000000
|
||||
VICL_ADDRESS EQU 0xE0C00F00
|
||||
VICH_ADDRESS EQU 0xE0B00F00
|
||||
|
||||
|
||||
WDT_CTL EQU 0xE4B00000
|
||||
|
||||
ITCM0_BaseAddress EQU 0xA0000000 ;ITCM0 base : 0xA0000000, Size : 8KB,
|
||||
ITCM1_BaseAddress EQU 0xA0002000 ;ITCM1 base : 0xA0002000, Size : 8KB,
|
||||
DTCM0_BaseAddress EQU 0xA0004000 ;DTCM0 base : 0xA0004000, Size : 8KB,
|
||||
DTCM1_BaseAddress EQU 0xA0006000 ;DTCM1 base : 0xA0006000, Size : 8KB,
|
||||
477
A58-AMTLDR/Src/Entry.c
Normal file
477
A58-AMTLDR/Src/Entry.c
Normal file
@ -0,0 +1,477 @@
|
||||
/*
|
||||
**********************************************************************
|
||||
Copyright (c)2009 Arkmicro Technologies Inc. All Rights Reserved
|
||||
Filename: boot.c
|
||||
Version : 1.00
|
||||
Date : 2010.06.29
|
||||
Author : Donier
|
||||
Abstract: Ark2116 SoC boot rom code file.
|
||||
Note : The size the code(*.bin) loaded should never exceed 10K Bytes.
|
||||
History : From the ark2116 SoC boot rom code file.
|
||||
***********************************************************************
|
||||
*/
|
||||
#include "typedef.h"
|
||||
#include "amt630h.h"
|
||||
#include "BootModeSel.h"
|
||||
#include "UartPrint.h"
|
||||
#include "timer.h"
|
||||
#include "mmu.h"
|
||||
#include "sysinfo.h"
|
||||
#include "spi.h"
|
||||
|
||||
#define PROJECT_FOR_DDR_INIT 0
|
||||
#define PROJECT_FOR_SPIFLASH_LOADER 1
|
||||
#define PROJECT_FOR_SD_UPDATE 2
|
||||
#define PROJECT_FOR_JTAG_UPDATE 3
|
||||
#define PROJECT_FOR_EMMC_LOADER 4
|
||||
#define PROJECT_FOR_LAUNCH_EMMC 5
|
||||
|
||||
#define PROJECT_PURPOSE PROJECT_FOR_JTAG_UPDATE
|
||||
|
||||
#if PROJECT_PURPOSE == PROJECT_FOR_EMMC_LOADER || PROJECT_PURPOSE == PROJECT_FOR_LAUNCH_EMMC
|
||||
#if DEVICE_TYPE_SELECT != EMMC_FLASH
|
||||
#error "you should select emmc flash device type!"
|
||||
#endif
|
||||
#endif
|
||||
//ok //err//ok //ok //err//ok //ok
|
||||
#define SYSPLL_CLK 400 //550//600//550//400//500//300//400
|
||||
#define CPUPLL_CLK 550 //550//550//550//550//500//550//550
|
||||
#define DDRPLL_CLK 600 //700//700//700//600//700//700//700 （RGB屏超过600M低温卡死，lvds屏正常）
|
||||
#define VPUPLL_CLK 240 //240//240//240//240//240//240//240
|
||||
|
||||
#define CLK_APB_FREQ (SYSPLL_CLK * 1000000 / 2)
|
||||
#define OSC_FREQ 24000000
|
||||
|
||||
#define tref 1560 //(unsigned int)((3900*DDR_CLK)/1000)
|
||||
#define cas 6
|
||||
#define twl 5
|
||||
#define tmrd 4
|
||||
#define tras 19 //13 //(unsigned int)((45*DDR_CLK)/1000)
|
||||
#define trc 28 //16 //(unsigned int)((60*DDR_CLK)/1000)
|
||||
#define trcd 6 //(unsigned int)((15*DDR_CLK)/1000)
|
||||
#define trfc 45 //37 //(unsigned int)((105*DDR_CLK)/1000)
|
||||
#define trp 6 //(unsigned int)((15*DDR_CLK)/1000)
|
||||
#define trrd 5 //(unsigned int)((10*DDR_CLK)/1000)
|
||||
#define twr 6 //(unsigned int)((15*DDR_CLK)/1000)
|
||||
#define twtr 4 //(unsigned int)((8*DDR_CLK)/1000)
|
||||
#define txp 4
|
||||
#define txsr 200
|
||||
#define tesr 6
|
||||
#define tfaw 18 //(unsigned int)((45*DDR_CLK)/1000)
|
||||
|
||||
extern void SetSysPLL(unsigned int freq);
|
||||
extern void SetCpuPLL(unsigned int freq);
|
||||
extern void SetDDRPLL(unsigned int freq);
|
||||
extern void SetVPUPLL(unsigned int freq);
|
||||
extern void SetXclkAHBclkAPBclk(void);
|
||||
extern void SetSpiclk(void);
|
||||
extern void SetGpuclk(void);
|
||||
extern void SetMfcclk(void);
|
||||
extern void SwitchTo24MHz(void);
|
||||
extern void updateFromSD(int chipid);
|
||||
extern void FlashBurn(void *buf, unsigned int offset, unsigned int size);
|
||||
extern int wdt_init(unsigned int clk_freq);
|
||||
extern int EmmcInit(int chipid);
|
||||
extern void launchEMMC(int chipid);
|
||||
extern int EmmcBurn(void *buf, unsigned int offset, unsigned int size, int show_progress);
|
||||
|
||||
static void delay(volatile UINT32 count )
|
||||
{
|
||||
while(count--);
|
||||
}
|
||||
|
||||
void ddr_rd_clk_config()
|
||||
{
|
||||
unsigned int i;
|
||||
rSYS_DDRCTL1_CFG = 0x01; //reset pll
|
||||
delay(1000);
|
||||
rSYS_DDRCTL1_CFG = 0x00; //enable pll
|
||||
delay(100000);
|
||||
i = 0x01 << 1 | 200 << 8;
|
||||
rSYS_DDRCTL1_CFG = i;
|
||||
delay(100000);
|
||||
}
|
||||
|
||||
void ddr_training_one(void)
|
||||
{
|
||||
int value = 0;
|
||||
|
||||
rSYS_DDRCTL_CFG = (1<<15);
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x30<<16);
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x18<<16); fail 25
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x20<<16); 25 ok
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x28<<16); 25 ok
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x30<<16);
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x26<<16); //4 ok
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x20<<16); //1 ok
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x30<<16); //4 ok 0514
|
||||
value = (0x1c<<0) |(0x1c<<8)|(0x33<<16); //4 ok
|
||||
// value = (0x1c<<0) |(0x1c<<8)|(0x3b<<16); //4 ok
|
||||
|
||||
rSYS_DDRCTL1_CFG =value;
|
||||
rSYS_DDRCTL2_CFG =value;
|
||||
}
|
||||
|
||||
#if 0
|
||||
#define DDR_TOTAL 0x10000
|
||||
int DDR3_RW_Test(void)
|
||||
{
|
||||
|
||||
unsigned int i=0;
|
||||
unsigned int data_char;
|
||||
|
||||
for (i=0; i<DDR_TOTAL; i++)
|
||||
{
|
||||
(*(volatile unsigned int *)(0x20000000 + (i*4))) =i+0x04;
|
||||
//PrintVariableValueHex("write is %x",i+4);
|
||||
}
|
||||
|
||||
for (i=0; i<DDR_TOTAL;i++)
|
||||
{
|
||||
data_char =(*(volatile unsigned int *)(0x20000000 + (i*4 )));
|
||||
// PrintVariableValueHex("read is %x",data_char);
|
||||
if(data_char!=(i+0x04))
|
||||
// if(data_char!=0x55aabbcc)
|
||||
{
|
||||
// SendUartString("\r\nddr error\r\n");
|
||||
// PrintVariableValueHex("read is ",data_char);
|
||||
// PrintVariableValueHex("addr is ",(0x20000000 + (i*4 )));
|
||||
break;
|
||||
}
|
||||
// PrintVariableValueHex("datachar11",data_char);
|
||||
}
|
||||
SendUartString("ddr1 test1 end \n");
|
||||
|
||||
if(i==DDR_TOTAL)
|
||||
{
|
||||
SendUartString("ddr1 test1 ok \n");
|
||||
}
|
||||
|
||||
for (i=0; i<DDR_TOTAL; i++)
|
||||
{
|
||||
(*(volatile unsigned int *)(0x20000000 + (i*4))) = 0x20000000 + (i*4);
|
||||
//PrintVariableValueHex("write is ",i+4);
|
||||
data_char =(*(volatile unsigned int *)(0x20000000 + (i*4 )));
|
||||
if(data_char!=(0x20000000 + (i*4 )))
|
||||
{
|
||||
// SendUartString("\ddr error\n");
|
||||
// PrintVariableValueHex("read is",data_char);
|
||||
// PrintVariableValueHex("addr is ",(0x20000000 + (i*4 )));
|
||||
break;
|
||||
}
|
||||
}
|
||||
SendUartString("\nddr1 test2 end \n");
|
||||
|
||||
if(i==DDR_TOTAL)
|
||||
{
|
||||
SendUartString("ddr1 test2 ok \n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ddr_training(void)
|
||||
{
|
||||
int i=0;
|
||||
int j=0;
|
||||
int value =0 ;
|
||||
unsigned int result;
|
||||
|
||||
rSYS_DDRCTL_CFG = (1<<15);
|
||||
|
||||
//printk("rd_dly:(0x08----0x30);qs_dly:(0x00------0x40)\r\n");
|
||||
//printk("rd_dly: ");
|
||||
//for(j=0x08;j<0x30;j=j+1)
|
||||
//printk(" %2d",j);
|
||||
//printk("\r\n");
|
||||
|
||||
for(j=0x18; j<0x30; j++)
|
||||
// for(i=0x00;i<0x40;i++)
|
||||
{
|
||||
//printk(" 0x%2x ",i);
|
||||
for(i=0x00;i<0x40;i++)
|
||||
//for(j=0x18;j<0x30;j++)
|
||||
{
|
||||
udelay(3);
|
||||
//j = 0x18;
|
||||
udelay(3);
|
||||
value = i |(i<<8)|(j<<16); //|i<<16 ;
|
||||
*(volatile unsigned int *)0x60000074 =value;
|
||||
*(volatile unsigned int *)0x600000b0 =value;
|
||||
udelay(3000);
|
||||
result = DDR3_RW_Test();
|
||||
udelay(3000);
|
||||
if(result)
|
||||
SendUartString("O");
|
||||
else
|
||||
SendUartString("X");
|
||||
udelay(3);
|
||||
}
|
||||
SendUartString("\r\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
void ddr3_sdramc_init(void)
|
||||
{
|
||||
unsigned long i;
|
||||
//unsigned int rdata=0;
|
||||
|
||||
//i = rSYS_DDRCTL1_CFG;
|
||||
//i &= ~((0xFF << 24) |(0xFF << 16) | (0x7F << 8) | 0x7F);
|
||||
//i |= (0x40 << 24) |(0x40 << 8) | 0x40;
|
||||
//rSYS_DDRCTL1_CFG = i;
|
||||
|
||||
ddr_training_one();
|
||||
|
||||
rSYS_DDRCTL3_CFG = (0x0 <<11 | 0x01 <<10);
|
||||
|
||||
//ddr initialization
|
||||
// i= 0x2;
|
||||
// READ_DELAY_REG = i;
|
||||
//active_chip qos burst stop auto_power_down power_down_cycle row col
|
||||
i = 0x0 << 21 | 0x0 <<18 | 0x2 << 15 | 0x0 <<14 | 0x0 <<13 | 0x0 << 7 | 0x2 <<3 | 0x2<< 0;
|
||||
MEM_CFG_REG = i;
|
||||
// mem_width bank_bit cke_init dqm_init clk_cfg
|
||||
i = 0x0 <<6 | 0x0 << 4 | 0x0 <<3 | 0x0 <<2 | 0x0 << 0;
|
||||
MEM_CFG2_REG = i;
|
||||
// ref timeout
|
||||
i = 0x1 << 0;
|
||||
MEM_CFG3_REG = i;
|
||||
//addr_fmt addr_match addr_mask
|
||||
i = 0x1 << 16 | 0x20 <<8 | 0xfc << 0;
|
||||
CHIP_CFG_REG = i;
|
||||
//wr_block | early_resp
|
||||
i= 0x0<<2 | 0x0 << 0;
|
||||
FEA_CTL_REG = i;
|
||||
//tref
|
||||
i= tref;
|
||||
//i= 0x300;
|
||||
REF_PRD_REG = i;
|
||||
//cas
|
||||
i= cas<<1;
|
||||
TCAS_REG = i;
|
||||
//twl
|
||||
//i= 0x1<< 0;
|
||||
i= twl<< 0;
|
||||
TWL_REG = i;
|
||||
//tmrd
|
||||
//i= 0x10<< 0;
|
||||
i= tmrd<< 0;
|
||||
TMRD_REG = i;
|
||||
//tras
|
||||
i= (tras)<< 0;
|
||||
TRAS_REG = i;
|
||||
//trc
|
||||
i= trc << 0;
|
||||
TRC_REG = i;
|
||||
//trcd schelue rcd
|
||||
//i= 0x2<< 0 | 0x2<<3;
|
||||
i= trcd<< 0 | (trcd-3)<<8;
|
||||
TRCD_REG = i;
|
||||
//schelue trfc trfc
|
||||
//i= 15<<5|18<< 0;
|
||||
i= (trfc-3)<<8|trfc<< 0;
|
||||
TRFC_REG = i;
|
||||
//trp
|
||||
//i= 0x3<< 0 | 0x2 << 3;
|
||||
i= trp<< 0 | (trp-3) << 8;
|
||||
TRP_REG = i;
|
||||
//trrd
|
||||
//i= 0x6<< 0;
|
||||
i= trrd<< 0;
|
||||
TRRD_REG = i;
|
||||
//twr
|
||||
i= twr<< 0;
|
||||
TWR_REG = i;
|
||||
//twtr
|
||||
//i= 0x7<< 0;
|
||||
i= twtr<< 0;
|
||||
TWTR_REG = i;
|
||||
//txp
|
||||
//i= 0x40<< 0;
|
||||
i= txp<< 0;
|
||||
TXP_REG = i;
|
||||
//txsr
|
||||
//i= 199<< 0;
|
||||
i= txsr<< 0;
|
||||
TXSR_REG = i;
|
||||
//tesr
|
||||
i= tesr<< 0;
|
||||
TESR_REG = i;
|
||||
//tfaw
|
||||
i= tfaw<< 0|(tfaw-3)<<8;
|
||||
TFAW_REG = i;
|
||||
|
||||
//
|
||||
// //precharge
|
||||
DIR_CMD_REG = 0x000c0000 ; //direct_cmd_reg nop
|
||||
DIR_CMD_REG = 0x00000000 ; //direct_cmd_reg precharge
|
||||
DIR_CMD_REG = 0x000a0000 ; //direct_cmd_reg xmodereg2 set
|
||||
DIR_CMD_REG = 0x000b0000 ; //direct_cmd_reg xmodereg3 set
|
||||
DIR_CMD_REG = 0x00090000 |(0<<6)|(1<<2); //direct_cmd_reg xmodereg set
|
||||
|
||||
// DIR_CMD_REG = 0x00080952 ; //direct_cmd_reg modereg set
|
||||
DIR_CMD_REG = 0x00080962 ; //direct_cmd_reg modereg set
|
||||
DIR_CMD_REG = 0x00000000 ; //direct_cmd_reg precharge
|
||||
DIR_CMD_REG = 0x00040000 ; //direct_cmd_reg autorefresh
|
||||
DIR_CMD_REG = 0x00040000 ; //direct_cmd_reg autorefresh
|
||||
// DIR_CMD_REG = 0x00080852 ; //direct_cmd_reg modereg set
|
||||
DIR_CMD_REG = 0x00080862 ; //direct_cmd_reg modereg set
|
||||
// DIR_CMD_REG = 0x00090380 ; //direct_cmd_reg xmodereg1 set
|
||||
// DIR_CMD_REG = 0x00090000 ; //direct_cmd_reg xmodereg1 set
|
||||
|
||||
MEM_CMD_REG = 0x00000000 ; //mem_cmd_reg go
|
||||
|
||||
while ((MEM_STA_REG &0x01)!=0x01);
|
||||
|
||||
//ddr_training(); //Only for test.
|
||||
// *(volatile unsigned int *)0x60000074 = 0x9; //0x6;//0xD;
|
||||
}
|
||||
|
||||
void updateFromJtag(void)
|
||||
{
|
||||
unsigned int loader_addr = 0x20000000;
|
||||
#if DEVICE_TYPE_SELECT == EMMC_FLASH
|
||||
unsigned int launch_addr = 0x20008000;
|
||||
#endif
|
||||
unsigned int stepldr_addr = 0x20010000;
|
||||
unsigned int app_addr = 0x20100000;
|
||||
UpFileHeader *header = (UpFileHeader *)app_addr;
|
||||
|
||||
SysInfo *sysinfo = GetSysInfo();
|
||||
sysinfo->app_checksum = header->checksum;
|
||||
sysinfo->stepldr_offset = STEPLDRA_OFFSET;
|
||||
sysinfo->stepldr_size = STEPLDR_MAX_SIZE;
|
||||
sysinfo->update_status = UPDATE_STATUS_END;
|
||||
sysinfo->image_offset = IMAGE_OFFSET;
|
||||
sysinfo->loader_offset = LOADER_OFFSET;
|
||||
sysinfo->loader_size = LOADER_MAX_SIZE;
|
||||
|
||||
#if DEVICE_TYPE_SELECT != EMMC_FLASH
|
||||
SendUartString("burn loader start... \r\n");
|
||||
FlashBurn((void*)loader_addr, LOADER_OFFSET, LOADER_MAX_SIZE);
|
||||
SendUartString("burn loader end. \r\n");
|
||||
|
||||
SendUartString("burn stepldr start... \r\n");
|
||||
FlashBurn((void*)stepldr_addr, STEPLDRA_OFFSET, STEPLDR_MAX_SIZE);
|
||||
SendUartString("burn stepldr end. \r\n");
|
||||
|
||||
SendUartString("burn app start... \r\n");
|
||||
FlashBurn((void*)app_addr, IMAGE_OFFSET, header->size);
|
||||
SendUartString("burn app end. \r\n");
|
||||
#else
|
||||
EmmcInit(0);
|
||||
|
||||
SendUartString("burn launch start... \r\n");
|
||||
FlashBurn((void*)launch_addr, LOADER_OFFSET, LOADER_MAX_SIZE);
|
||||
SendUartString("burn launch end. \r\n");
|
||||
|
||||
SendUartString("burn loader start... \r\n");
|
||||
EmmcBurn((void*)loader_addr, LOADER_OFFSET, LOADER_MAX_SIZE, 0);
|
||||
SendUartString("burn loader end. \r\n");
|
||||
|
||||
SendUartString("burn stepldr start... \r\n");
|
||||
EmmcBurn((void*)stepldr_addr, STEPLDRA_OFFSET, STEPLDR_MAX_SIZE, 0);
|
||||
SendUartString("burn stepldr end. \r\n");
|
||||
|
||||
SendUartString("burn app start... \r\n");
|
||||
EmmcBurn((void*)app_addr, IMAGE_OFFSET, header->size, 0);
|
||||
SendUartString("burn app end. \r\n");
|
||||
#endif
|
||||
|
||||
SaveSysInfo(sysinfo);
|
||||
|
||||
SendUartString("Update is finished. Please reset. \r\n");
|
||||
while(1);
|
||||
}
|
||||
|
||||
void main(void)
|
||||
{
|
||||
unsigned int val;
|
||||
|
||||
//set all io drive to 4ma(default 8ma).
|
||||
rSYS_IO_DRIVER00=0x55555555;
|
||||
rSYS_IO_DRIVER01=0x55555555;
|
||||
rSYS_IO_DRIVER02=0x55555555;
|
||||
rSYS_IO_DRIVER03=0x55555555;
|
||||
rSYS_IO_DRIVER04=0x55555555;
|
||||
rSYS_IO_DRIVER05=0x55555555;
|
||||
rSYS_IO_DRIVER06=0x55555555;
|
||||
|
||||
#if PROJECT_PURPOSE == PROJECT_FOR_LAUNCH_EMMC
|
||||
timer_init();
|
||||
InitUart(115200);
|
||||
SendUartString("\nARK AMT630Hv100 launch emmc from norflash\r\n");
|
||||
wdt_init(OSC_FREQ);
|
||||
launchEMMC(0);
|
||||
#endif
|
||||
|
||||
SwitchTo24MHz();
|
||||
timer_init();
|
||||
InitUart(115200);
|
||||
SendUartString("\nARK AMT630Hv100 AMTLDR 0906_700M\n");
|
||||
/*
|
||||
val = rSYS_ANA1_CFG;
|
||||
val |= (1 << 4)|(5 << 1);
|
||||
rSYS_ANA1_CFG = val;
|
||||
udelay(300);
|
||||
val = rSYS_ANA1_CFG;
|
||||
val &= ~(0x1 <<5);
|
||||
rSYS_ANA1_CFG = val;
|
||||
*/
|
||||
#if 1 //低电压2.8V复位
|
||||
rSYS_ANA1_CFG |= (1 << 4)|(5 << 1);
|
||||
udelay(300);
|
||||
rSYS_ANA1_CFG |= (1 << 5);
|
||||
udelay(100);
|
||||
#else //低电压2.5V复位
|
||||
rSYS_ANA1_CFG |= (1 << 4)|(0 << 1);
|
||||
udelay(3000);
|
||||
rSYS_ANA1_CFG |= (1 << 5);
|
||||
udelay(1000);
|
||||
#endif
|
||||
val = rSYS_ANA2_CFG;
|
||||
val = (0x3F <<6)|(1 << 2)|(1 << 0);
|
||||
rSYS_ANA2_CFG = val;
|
||||
|
||||
SetSysPLL(SYSPLL_CLK);
|
||||
SetCpuPLL(CPUPLL_CLK);
|
||||
SetDDRPLL(DDRPLL_CLK);
|
||||
SetVPUPLL(VPUPLL_CLK);
|
||||
udelay(500);
|
||||
|
||||
SetXclkAHBclkAPBclk();
|
||||
SetSpiclk();
|
||||
SetGpuclk();
|
||||
SetMfcclk();
|
||||
mdelay(50); //50
|
||||
|
||||
#if PROJECT_PURPOSE == PROJECT_FOR_SPIFLASH_LOADER || PROJECT_PURPOSE == PROJECT_FOR_EMMC_LOADER
|
||||
wdt_init(CLK_APB_FREQ);
|
||||
#endif
|
||||
|
||||
ddr3_sdramc_init();
|
||||
mdelay(50); //80//100
|
||||
SendUartString("\nDDR init over2!!_m50\n");
|
||||
SpiInit();
|
||||
#ifdef MMU_ENABLE
|
||||
MMU_Init();
|
||||
#endif
|
||||
|
||||
#if PROJECT_PURPOSE == PROJECT_FOR_DDR_INIT
|
||||
while(1);
|
||||
#elif PROJECT_PURPOSE == PROJECT_FOR_SPIFLASH_LOADER
|
||||
bootFromSPI();
|
||||
#elif PROJECT_PURPOSE == PROJECT_FOR_SD_UPDATE
|
||||
SetDefaultSysInfo();
|
||||
SaveSysInfo(0);
|
||||
updateFromSD(0);
|
||||
bootFromSPI();
|
||||
#elif PROJECT_PURPOSE == PROJECT_FOR_JTAG_UPDATE
|
||||
updateFromJtag();
|
||||
#elif PROJECT_PURPOSE == PROJECT_FOR_EMMC_LOADER
|
||||
bootFromEMMC(0);
|
||||
#endif
|
||||
}
|
||||
747
A58-AMTLDR/Src/SpiBooter.c
Normal file
747
A58-AMTLDR/Src/SpiBooter.c
Normal file
@ -0,0 +1,747 @@
|
||||
#include <string.h>
|
||||
#include "typedef.h"
|
||||
#include "amt630h.h"
|
||||
#include "UartPrint.h"
|
||||
#include "timer.h"
|
||||
#include "spi.h"
|
||||
#include "cp15.h"
|
||||
#include "sysinfo.h"
|
||||
#include "crc32.h"
|
||||
#include "gpio.h"
|
||||
|
||||
|
||||
#if DEVICE_TYPE_SELECT == SPI_NOR_FLASH || DEVICE_TYPE_SELECT == EMMC_FLASH
|
||||
#define SPI_CS_GPIO 32
|
||||
|
||||
#define SPI_RXFIFO_FULL (1<<4)
|
||||
#define SPI_RXFIFO_NOTEMPTY (1<<3)
|
||||
#define SPI_TXFIFO_EMPTY (1<<2)
|
||||
#define SPI_TXFIFO_NOTFULL (1<<1)
|
||||
#define SPIFLASH_BUSY (1<<0)
|
||||
|
||||
/* SFUD support manufacturer JEDEC ID */
|
||||
#define SFUD_MF_ID_CYPRESS 0x01
|
||||
#define SFUD_MF_ID_FUJITSU 0x04
|
||||
#define SFUD_MF_ID_EON 0x1C
|
||||
#define SFUD_MF_ID_ATMEL 0x1F
|
||||
#define SFUD_MF_ID_MICRON 0x20
|
||||
#define SFUD_MF_ID_AMIC 0x37
|
||||
#define SFUD_MF_ID_SANYO 0x62
|
||||
#define SFUD_MF_ID_INTEL 0x89
|
||||
#define SFUD_MF_ID_ESMT 0x8C
|
||||
#define SFUD_MF_ID_FUDAN 0xA1
|
||||
#define SFUD_MF_ID_HYUNDAI 0xAD
|
||||
#define SFUD_MF_ID_SST 0xBF
|
||||
#define SFUD_MF_ID_MICRONIX 0xC2
|
||||
#define SFUD_MF_ID_GIGADEVICE 0xC8
|
||||
#define SFUD_MF_ID_ISSI 0xD5
|
||||
#define SFUD_MF_ID_WINBOND 0xEF
|
||||
|
||||
static void SpiWriteEnable(void);
|
||||
|
||||
/* flash chip information */
|
||||
typedef struct {
|
||||
char *name; /**< flash chip name */
|
||||
uint8_t mf_id; /**< manufacturer ID */
|
||||
uint8_t type_id; /**< memory type ID */
|
||||
uint8_t capacity_id; /**< capacity ID */
|
||||
uint32_t capacity; /**< flash capacity (bytes) */
|
||||
} flash_chip;
|
||||
|
||||
static const flash_chip flash_chip_table[] =
|
||||
{
|
||||
{"W25Q40BV", SFUD_MF_ID_WINBOND, 0x40, 0x13, 512L*1024L},
|
||||
{"W25Q16BV", SFUD_MF_ID_WINBOND, 0x40, 0x15, 2L*1024L*1024L},
|
||||
{"W25Q32BV", SFUD_MF_ID_WINBOND, 0x40, 0x16, 4L*1024L*1024L},
|
||||
{"W25Q64CV", SFUD_MF_ID_WINBOND, 0x40, 0x17, 8L*1024L*1024L},
|
||||
{"W25Q64DW", SFUD_MF_ID_WINBOND, 0x60, 0x17, 8L*1024L*1024L},
|
||||
{"W25Q128BV", SFUD_MF_ID_WINBOND, 0x40, 0x18, 16L*1024L*1024L},
|
||||
{"W25Q256FV", SFUD_MF_ID_WINBOND, 0x40, 0x19, 32L*1024L*1024L},
|
||||
{"W25H256JV", SFUD_MF_ID_WINBOND, 0x90, 0x19, 32L*1024L*1024L},
|
||||
{"W25Q512JVFM", SFUD_MF_ID_WINBOND, 0x70, 0x20, 64L*1024L*1024L},
|
||||
{"SST25VF080B", SFUD_MF_ID_SST, 0x25, 0x8E, 1L*1024L*1024L},
|
||||
{"SST25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L},
|
||||
{"EN25Q32B", SFUD_MF_ID_EON, 0x30, 0x16, 4L*1024L*1024L},
|
||||
{"GD25Q64B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, 8L*1024L*1024L},
|
||||
{"GD25Q16B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x15, 2L*1024L*1024L},
|
||||
{"GD25Q32C", SFUD_MF_ID_GIGADEVICE, 0x40, 0x16, 4L*1024L*1024L},
|
||||
{"S25FL216K", SFUD_MF_ID_CYPRESS, 0x40, 0x15, 2L*1024L*1024L},
|
||||
{"S25FL032P", SFUD_MF_ID_CYPRESS, 0x02, 0x15, 4L*1024L*1024L},
|
||||
{"A25L080", SFUD_MF_ID_AMIC, 0x30, 0x14, 1L*1024L*1024L},
|
||||
{"F25L004", SFUD_MF_ID_ESMT, 0x20, 0x13, 512L*1024L},
|
||||
{"PCT25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L},
|
||||
{"IS25LP128F", SFUD_MF_ID_ISSI, 0x60, 0x18, 16L*1024L*1024L},
|
||||
{"MX25L6433F", SFUD_MF_ID_MICRONIX, 0x20, 0x17, 8L*1024L*1024L},
|
||||
{"MX25L12845G", SFUD_MF_ID_MICRONIX, 0x20, 0x18, 16L*1024L*1024L},
|
||||
{"MX25L25645G", SFUD_MF_ID_MICRONIX, 0x20, 0x19, 32L*1024L*1024L},
|
||||
{"W25Q512JVFM", SFUD_MF_ID_WINBOND, 0x70, 0x20, 64L*1024L*1024L},
|
||||
{"GD25B512ME", SFUD_MF_ID_GIGADEVICE, 0x47, 0x1A, 64L*1024L*1024L},
|
||||
};
|
||||
|
||||
static int addr_in_4_byte = 0;
|
||||
|
||||
static void SetCSGpioEnable(int enable)
|
||||
{
|
||||
gpio_direction_output(SPI_CS_GPIO, !enable);
|
||||
}
|
||||
|
||||
static void SetSpiDataMode(unsigned int bitMode)
|
||||
{
|
||||
unsigned int val = 0;
|
||||
|
||||
(void)val;
|
||||
while((rSPI_SR & SPI_BUSY));
|
||||
rSPI_SSIENR = 0;
|
||||
val = rSPI_CTLR0;
|
||||
val &=~(0x1f<<16);
|
||||
val |=((bitMode-1)<<16);
|
||||
rSPI_CTLR0 = val;
|
||||
rSPI_SSIENR = 1;
|
||||
}
|
||||
|
||||
static void SpiWaitIdle(void)
|
||||
{
|
||||
while(rSPI_SR & SPIFLASH_BUSY);
|
||||
udelay(2);
|
||||
}
|
||||
|
||||
static void SpiEmptyRxFIFO(void)
|
||||
{
|
||||
INT32 data = 0;
|
||||
|
||||
(void)data;
|
||||
|
||||
while(rSPI_SR & SPI_RXFIFO_NOTEMPTY)
|
||||
data = rSPI_DR;
|
||||
}
|
||||
|
||||
/* static void SpiWriteSta2(uint8_t status)
|
||||
{
|
||||
SpiWriteEnable();
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_WRITE_STATUS2;
|
||||
rSPI_DR = status;
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
static UINT8 SpiReadSta2(void)
|
||||
{
|
||||
UINT8 status;
|
||||
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_READ_STATUS2;
|
||||
rSPI_DR = 0;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
status = rSPI_DR;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
status = rSPI_DR;
|
||||
PrintVariableValueHex("status s2 :", status);
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
return status;
|
||||
} */
|
||||
|
||||
static UINT8 SpiReadSta3(void)
|
||||
{
|
||||
UINT8 status;
|
||||
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_READ_STATUS3;
|
||||
rSPI_DR = 0;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
status = rSPI_DR;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
status = rSPI_DR;
|
||||
PrintVariableValueHex("status s3 :", status);
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
return status;
|
||||
}
|
||||
|
||||
static UINT8 SpiReadSta(void)
|
||||
{
|
||||
UINT8 status;
|
||||
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_READ_STATUS;
|
||||
rSPI_DR = 0;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
status = rSPI_DR;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
status = rSPI_DR;
|
||||
//PrintVariableValueHex("status:", status);
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
return status;
|
||||
}
|
||||
|
||||
static void SpiDisable4ByteMode(void)
|
||||
{
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_DISABLE_4BYTE_MODE;
|
||||
while(!(rSPI_SR & SPI_TXFIFO_EMPTY));
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
static void SpiEnable4ByteMode(void)
|
||||
{
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_ENABLE_4BYTE_MODE;
|
||||
while(!(rSPI_SR & SPI_TXFIFO_EMPTY));
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
static void SpiReadPage(UINT32 pagenum, UINT32 *buf)
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 val = 0;
|
||||
INT32 i, j;
|
||||
UINT8 tmpaddr[4];
|
||||
UINT8 *data = (UINT8*)buf;
|
||||
|
||||
(void)val;
|
||||
|
||||
addr = pagenum*BYTESPERPAGE;
|
||||
tmpaddr[0] = addr;
|
||||
tmpaddr[1] = addr>>8;
|
||||
tmpaddr[2] = addr>>16;
|
||||
tmpaddr[3] = addr>>24;
|
||||
|
||||
SpiEmptyRxFIFO();
|
||||
SetCSGpioEnable(1);
|
||||
|
||||
if (addr_in_4_byte) {
|
||||
SetSpiDataMode(8);
|
||||
rSPI_DR = SPI_4BYTEADDR_READ_DATA;
|
||||
rSPI_DR = tmpaddr[3];
|
||||
rSPI_DR = tmpaddr[2];
|
||||
rSPI_DR = tmpaddr[1];
|
||||
rSPI_DR = tmpaddr[0];
|
||||
for (i = 0; i < 5; i++) {
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
val = rSPI_DR;
|
||||
}
|
||||
} else {
|
||||
rSPI_DR = (tmpaddr[0]<<24) | (tmpaddr[1]<<16) | (tmpaddr[2]<<8) | SPI_READ_DATA;
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
val = rSPI_DR;
|
||||
}
|
||||
|
||||
if (addr_in_4_byte) {
|
||||
for (i = 0; i < 4; i++) {
|
||||
for (j = 0; j < WORDSPERPAGE; j++) {
|
||||
while(!(rSPI_SR & SPI_TXFIFO_NOTFULL));
|
||||
rSPI_DR = 0;
|
||||
}
|
||||
for (j = 0; j < WORDSPERPAGE; j++) {
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
*data++ = rSPI_DR;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < WORDSPERPAGE; i++) {
|
||||
while(!(rSPI_SR & SPI_TXFIFO_NOTFULL));
|
||||
rSPI_DR = 0;
|
||||
}
|
||||
for(i = 0; i < WORDSPERPAGE; i++) {
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
*buf++ = rSPI_DR;
|
||||
}
|
||||
}
|
||||
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
if (addr_in_4_byte)
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
void SpiSelectPad()
|
||||
{
|
||||
UINT32 val;
|
||||
val = rSYS_PAD_CTRL02;
|
||||
val &= ~0xfff;
|
||||
val |= (0x1<<10)|(0x1 << 8)|(0x1 << 6)|(0x1 << 4)| (0x1 << 2);
|
||||
rSYS_PAD_CTRL02 = val;
|
||||
|
||||
val = rSYS_SSP_CLK_CFG;
|
||||
val &= ~((0x1<<31)|(0x1<<30));
|
||||
val |= (0x1<<31)|(0x1<<30);
|
||||
rSYS_SSP_CLK_CFG = val;
|
||||
|
||||
//cs inactive first
|
||||
SetCSGpioEnable(0);
|
||||
}
|
||||
|
||||
void Reset(void)
|
||||
{
|
||||
SetSpiDataMode(8);
|
||||
rSPI_DR = 0x66;
|
||||
while((SpiReadSta() & SPI_BUSY));
|
||||
// while(!(SpiReadSta() & SPIFLASH_WRITEENABLE));
|
||||
rSPI_DR = 0x99;
|
||||
while((SpiReadSta() & SPI_BUSY));
|
||||
// while(!(SpiReadSta() & SPIFLASH_WRITEENABLE));
|
||||
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
#define SPI0_CS0_GPIO 32
|
||||
#define SPI0_IO0_GPIO 34
|
||||
static void dwspi_jedec252_reset(void)
|
||||
{
|
||||
int i;
|
||||
int si = 0;
|
||||
UINT32 val;
|
||||
|
||||
val = rSYS_PAD_CTRL02;
|
||||
val &= ~((3 << 4) | 3);
|
||||
rSYS_PAD_CTRL02 = val;
|
||||
|
||||
gpio_direction_output(SPI0_CS0_GPIO, 1);
|
||||
gpio_direction_output(SPI0_IO0_GPIO, 1);
|
||||
udelay(300);
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
gpio_direction_output(SPI0_CS0_GPIO, 0);
|
||||
gpio_direction_output(SPI0_IO0_GPIO, si);
|
||||
si = !si;
|
||||
udelay(300);
|
||||
gpio_direction_output(SPI0_CS0_GPIO, 1);
|
||||
udelay(300);
|
||||
}
|
||||
}
|
||||
|
||||
static void SpiReadDeviceId(UINT8 *mfid, UINT8 *devid)
|
||||
{
|
||||
UINT8 val[6];
|
||||
int i;
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_MF_DEVICE_ID;
|
||||
rSPI_DR = 0;
|
||||
rSPI_DR = 0;
|
||||
rSPI_DR = 0;
|
||||
rSPI_DR = 0;
|
||||
rSPI_DR = 0;
|
||||
for (i = 0; i < 6; i++)
|
||||
{
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
val[i] = rSPI_DR;
|
||||
}
|
||||
*mfid = val[4];
|
||||
*devid = val[5];
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
static void SpiReadJedecId(UINT8 *mfid, UINT8 *memid, UINT8 *capid)
|
||||
{
|
||||
UINT8 val[4];
|
||||
int i;
|
||||
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_READ_JEDEC_ID;
|
||||
rSPI_DR = 0;
|
||||
rSPI_DR = 0;
|
||||
rSPI_DR = 0;
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
{
|
||||
while(!(rSPI_SR & SPI_RXFIFO_NOTEMPTY));
|
||||
val[i] = rSPI_DR;
|
||||
}
|
||||
*mfid = val[1];
|
||||
*memid = val[2];
|
||||
*capid = val[3];
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
void SpiReadId(void)
|
||||
{
|
||||
UINT8 mfid,devid,memid,capid;
|
||||
|
||||
SpiReadDeviceId(&mfid,&devid);
|
||||
SpiReadJedecId(&mfid,&memid,&capid);
|
||||
PrintVariableValueHex("ManufacturerID: ", mfid);
|
||||
PrintVariableValueHex("DeviceID: ", devid);
|
||||
PrintVariableValueHex("Memory Type ID: ", memid);
|
||||
PrintVariableValueHex("Capacity ID: ", capid);
|
||||
}
|
||||
|
||||
int SpiInit(void)
|
||||
{
|
||||
uint8_t mfid, typeid, capid;
|
||||
unsigned int val;
|
||||
int i;
|
||||
|
||||
dwspi_jedec252_reset();
|
||||
SpiSelectPad();
|
||||
|
||||
val = rSYS_SOFT_RST;
|
||||
val &= ~(0x1<<8);
|
||||
rSYS_SOFT_RST = val;
|
||||
udelay(10);
|
||||
val |= (0x1<<8);
|
||||
rSYS_SOFT_RST = val;
|
||||
|
||||
rSPI_SSIENR = 0;
|
||||
rSPI_CTLR0 = 0;
|
||||
rSPI_CTLR0 |=(0<<21)|(0x1f<<16)|(0x0<<12)|(0x0<<8)|(0x0<<4);
|
||||
//rSPI_CTLR1 = 63;
|
||||
rSPI_BAUDR = 4;//42;//16;//2;
|
||||
rSPI_SER = 1;
|
||||
rSPI_IMR = 0;
|
||||
rSPI_SSIENR = 1;
|
||||
|
||||
// Reset();
|
||||
SpiReadJedecId(&mfid, &typeid, &capid);
|
||||
for (i = 0; i < sizeof(flash_chip_table) / sizeof(flash_chip); i++) {
|
||||
if ((flash_chip_table[i].mf_id == mfid)
|
||||
&& (flash_chip_table[i].type_id == typeid)
|
||||
&& (flash_chip_table[i].capacity_id == capid)) {
|
||||
if (flash_chip_table[i].capacity > 0x1000000) {
|
||||
PrintVariableValueHex("i is %x : ", i);
|
||||
addr_in_4_byte = 1;
|
||||
SpiEnable4ByteMode();
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!addr_in_4_byte)
|
||||
SpiDisable4ByteMode();
|
||||
|
||||
#ifdef SPI0_QSPI_MODE
|
||||
uint8_t status = SpiReadSta2();
|
||||
status |= SPI_QE;
|
||||
SpiWriteSta2(status);
|
||||
#endif
|
||||
|
||||
SpiReadSta3();
|
||||
|
||||
udelay(10000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define SPI_READ_MAXLEN BYTESPERPAGE
|
||||
|
||||
static void SpiLoadStepldr(void (*readfunc)(UINT32, UINT32 *))
|
||||
{
|
||||
unsigned int i = 0;
|
||||
UINT32 *buf = (UINT32*)STEPLDR_ENTRY;
|
||||
UINT32 offset;
|
||||
UINT32 size;
|
||||
UINT32 nPageCount;
|
||||
UINT32 nPageStart;
|
||||
|
||||
if (ReadSysInfo()) {
|
||||
SendUartString("read sysinfo fail, try to load stepldr part a.\n");
|
||||
offset = STEPLDRA_OFFSET;
|
||||
size = STEPLDR_MAX_SIZE;
|
||||
} else {
|
||||
SysInfo *sysinfo = GetSysInfo();
|
||||
offset = sysinfo->stepldr_offset;
|
||||
size = sysinfo->stepldr_size;
|
||||
}
|
||||
|
||||
PrintVariableValueHex("stepldr offset: ", offset);
|
||||
|
||||
nPageCount = (size + BYTESPERPAGE - 1) / BYTESPERPAGE;
|
||||
nPageStart = offset / BYTESPERPAGE;
|
||||
for(i = nPageStart; i < nPageStart + nPageCount; i++)
|
||||
{
|
||||
readfunc(i, buf);
|
||||
buf += BYTESPERPAGE/4;
|
||||
}
|
||||
|
||||
#ifdef MMU_ENABLE
|
||||
CP15_clean_dcache_for_dma(STEPLDR_ENTRY, STEPLDR_ENTRY + size);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void SpiWriteEnable(void)
|
||||
{
|
||||
SetSpiDataMode(8);
|
||||
SetCSGpioEnable(1);
|
||||
rSPI_DR = SPI_WRITE_ENABLE;
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
while((SpiReadSta() & SPI_BUSY));
|
||||
while(!(SpiReadSta() & SPIFLASH_WRITEENABLE));
|
||||
SetSpiDataMode(32);
|
||||
}
|
||||
|
||||
static void SpiEraseSector(UINT32 sectorNum)
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT8 tmpaddr[4];
|
||||
|
||||
addr = BYTESPERSECTOR*sectorNum;
|
||||
tmpaddr[0] = addr;
|
||||
tmpaddr[1] = addr>>8;
|
||||
tmpaddr[2] = addr>>16;
|
||||
tmpaddr[3] = addr>>24;
|
||||
|
||||
SpiWriteEnable();
|
||||
SetCSGpioEnable(1);
|
||||
if (addr_in_4_byte) {
|
||||
SetSpiDataMode(8);
|
||||
rSPI_DR = SPI_4BYTEADD_SECTOR_ERASE;
|
||||
rSPI_DR = tmpaddr[3];
|
||||
rSPI_DR = tmpaddr[2];
|
||||
rSPI_DR = tmpaddr[1];
|
||||
rSPI_DR = tmpaddr[0];
|
||||
} else {
|
||||
rSPI_DR = (tmpaddr[0]<<24) | (tmpaddr[1]<<16) | (tmpaddr[2]<<8) | SPI_SECTOR_ERASE;
|
||||
}
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
while((SpiReadSta() & SPIFLASH_WRITEENABLE));
|
||||
}
|
||||
|
||||
static void SpiEraseBlock(UINT32 blockNum)
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT8 tmpaddr[4];
|
||||
|
||||
addr = BYTESPERBLOCK*blockNum;
|
||||
tmpaddr[0] = addr;
|
||||
tmpaddr[1] = addr>>8;
|
||||
tmpaddr[2] = addr>>16;
|
||||
tmpaddr[3] = addr>>24;
|
||||
|
||||
SpiWriteEnable();
|
||||
SetCSGpioEnable(1);
|
||||
if (addr_in_4_byte) {
|
||||
SetSpiDataMode(8);
|
||||
rSPI_DR = SPI_4BYTEADD_BLOCK_ERASE;
|
||||
rSPI_DR = tmpaddr[3];
|
||||
rSPI_DR = tmpaddr[2];
|
||||
rSPI_DR = tmpaddr[1];
|
||||
rSPI_DR = tmpaddr[0];
|
||||
} else {
|
||||
rSPI_DR = (tmpaddr[0]<<24) | (tmpaddr[1]<<16) | (tmpaddr[2]<<8) | SPI_BLOCK_ERASE;
|
||||
}
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
|
||||
while((SpiReadSta() & SPIFLASH_WRITEENABLE));
|
||||
}
|
||||
|
||||
static void SpiWritePage(UINT32 pagenum, UINT32 *buf)
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 val = 0;;
|
||||
INT32 i;
|
||||
UINT8 tmpaddr[4];
|
||||
UINT8 *data = (UINT8*)buf;
|
||||
|
||||
(void)val;
|
||||
|
||||
addr = pagenum*BYTESPERPAGE;
|
||||
tmpaddr[0] = addr;
|
||||
tmpaddr[1] = addr>>8;
|
||||
tmpaddr[2] = addr>>16;
|
||||
tmpaddr[3] = addr>>24;
|
||||
|
||||
SpiWriteEnable();
|
||||
SetCSGpioEnable(1);
|
||||
if (addr_in_4_byte) {
|
||||
SetSpiDataMode(8);
|
||||
rSPI_DR = SPI_4BYTEADD_PAGE_PROGRAM;
|
||||
rSPI_DR = tmpaddr[3];
|
||||
rSPI_DR = tmpaddr[2];
|
||||
rSPI_DR = tmpaddr[1];
|
||||
rSPI_DR = tmpaddr[0];
|
||||
} else {
|
||||
rSPI_DR = (tmpaddr[0]<<24) | (tmpaddr[1]<<16) | (tmpaddr[2]<<8) | SPI_PAGE_PROGRAM;
|
||||
}
|
||||
|
||||
if (addr_in_4_byte) {
|
||||
for (i = 0; i < BYTESPERPAGE; i++) {
|
||||
while(!(rSPI_SR & SPI_TXFIFO_NOTFULL));
|
||||
rSPI_DR = *data++;
|
||||
}
|
||||
} else {
|
||||
for (i = 0; i < WORDSPERPAGE; i++) {
|
||||
while(!(rSPI_SR & SPI_TXFIFO_NOTFULL));
|
||||
rSPI_DR = *buf++;
|
||||
}
|
||||
}
|
||||
SpiWaitIdle();
|
||||
SetCSGpioEnable(0);
|
||||
while(SpiReadSta() & SPI_BUSY);
|
||||
}
|
||||
|
||||
void bootFromSPI(void)
|
||||
{
|
||||
void (*funPtr)(void);
|
||||
|
||||
SpiLoadStepldr(SpiReadPage);
|
||||
|
||||
funPtr = (void (*)(void))STEPLDR_ENTRY;
|
||||
funPtr();
|
||||
}
|
||||
|
||||
static unsigned int pagecheck[WORDSPERPAGE];
|
||||
/* offset is at least align to SECOTR_SIZE */
|
||||
static int SpiNorBurnPage(int pagenum, unsigned int *buf)
|
||||
{
|
||||
int timeout = 3;
|
||||
unsigned int *tmp = (unsigned int *)buf;
|
||||
int i;
|
||||
|
||||
retry:
|
||||
SpiWritePage(pagenum, buf);
|
||||
SpiReadPage(pagenum, pagecheck);
|
||||
for (i = 0; i < WORDSPERPAGE; i++) {
|
||||
if (tmp[i] != pagecheck[i]) {
|
||||
if (timeout-- > 0) {
|
||||
PrintVariableValueHex("write: ", tmp[i]);
|
||||
PrintVariableValueHex("read: ", pagecheck[i]);
|
||||
SendUartString("burn check data fail, retry...\r\n");
|
||||
goto retry;
|
||||
} else {
|
||||
SendUartString("burn error!\r\n");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* offset is at least align to SECOTR_SIZE */
|
||||
static int SpiNorBurn(void *buf, unsigned int offset, unsigned int size)
|
||||
{
|
||||
int i, j;
|
||||
int secstart, secnum;
|
||||
int blkstart, blknum;
|
||||
int pagestart, pageburned;
|
||||
int remain = size;
|
||||
unsigned int *pbuf = (unsigned int *)buf;
|
||||
|
||||
pagestart = offset / BYTESPERPAGE;
|
||||
pageburned = 0;
|
||||
|
||||
while (remain > 0) {
|
||||
unsigned int tmp = offset & (BYTESPERBLOCK - 1);
|
||||
if (tmp) {
|
||||
tmp = (BYTESPERBLOCK - tmp) / BYTESPERSECTOR;
|
||||
secnum = (remain + BYTESPERSECTOR - 1) / BYTESPERSECTOR;
|
||||
secnum = min(tmp, secnum);
|
||||
secstart = offset / BYTESPERSECTOR;
|
||||
for (i = 0; i < secnum; i++) {
|
||||
SpiEraseSector(secstart + i);
|
||||
for (j = 0; j < PAGESPERSECTORS; j++) {
|
||||
if (SpiNorBurnPage(pagestart + j, pbuf))
|
||||
return -1;
|
||||
pbuf += WORDSPERPAGE;
|
||||
pageburned++;
|
||||
remain -= BYTESPERPAGE;
|
||||
if (remain <= 0) goto finish;
|
||||
}
|
||||
pagestart += PAGESPERSECTORS;
|
||||
}
|
||||
offset += secnum * BYTESPERSECTOR;
|
||||
} else {
|
||||
blkstart = offset / BYTESPERBLOCK;
|
||||
blknum = remain / BYTESPERBLOCK;
|
||||
for (i = 0; i < blknum; i++) {
|
||||
SpiEraseBlock(blkstart + i);
|
||||
for (j = 0; j < PAGESPERSECTORS * SECTORSPERBLOCK; j++) {
|
||||
if (SpiNorBurnPage(pagestart + j, pbuf))
|
||||
return -1;
|
||||
pbuf += WORDSPERPAGE;
|
||||
pageburned++;
|
||||
remain -= BYTESPERPAGE;
|
||||
if (remain <= 0) goto finish;
|
||||
}
|
||||
pagestart += PAGESPERSECTORS * SECTORSPERBLOCK;
|
||||
}
|
||||
offset += blknum * BYTESPERBLOCK;
|
||||
if (remain > 0) {
|
||||
secstart = offset / BYTESPERSECTOR;
|
||||
secnum = (remain + BYTESPERSECTOR - 1) / BYTESPERSECTOR;
|
||||
for (i = 0; i < secnum; i++) {
|
||||
SpiEraseSector(secstart + i);
|
||||
for (j = 0; j < PAGESPERSECTORS; j++) {
|
||||
if (SpiNorBurnPage(pagestart + j, pbuf))
|
||||
return -1;
|
||||
pbuf += WORDSPERPAGE;
|
||||
pageburned++;
|
||||
remain -= BYTESPERPAGE;
|
||||
if (remain <= 0) goto finish;
|
||||
}
|
||||
pagestart += PAGESPERSECTORS;
|
||||
}
|
||||
offset += secnum * BYTESPERSECTOR;
|
||||
}
|
||||
}
|
||||
}
|
||||
finish:
|
||||
return 0;
|
||||
}
|
||||
|
||||
int FlashBurn(void *buf, unsigned int offset, unsigned int size)
|
||||
{
|
||||
return SpiNorBurn(buf, offset, size);
|
||||
}
|
||||
|
||||
int SpiReadSysInfo(SysInfo *info)
|
||||
{
|
||||
int pagestart;
|
||||
UINT32 checksum;
|
||||
UINT32 calc_checksum;
|
||||
UINT8 data[512];
|
||||
|
||||
pagestart = SYSINFOA_OFFSET / BYTESPERPAGE;
|
||||
SpiReadPage(pagestart, (UINT32 *)data);
|
||||
|
||||
checksum = *(UINT32*)((UINT32)data + sizeof(SysInfo) - 4);
|
||||
calc_checksum = xcrc32((unsigned char*)data, sizeof(SysInfo) - 4, 0xffffffff);
|
||||
if (calc_checksum == checksum) {
|
||||
memcpy(info, data, sizeof(SysInfo));
|
||||
return 0;
|
||||
}
|
||||
|
||||
pagestart = SYSINFOB_OFFSET / BYTESPERPAGE;
|
||||
SpiReadPage(pagestart, (UINT32 *)data);
|
||||
|
||||
checksum = *(UINT32*)((UINT32)data + sizeof(SysInfo) - 4);
|
||||
calc_checksum = xcrc32((unsigned char*)data, sizeof(SysInfo) - 4, 0xffffffff);
|
||||
if (calc_checksum == checksum) {
|
||||
memcpy(info, data, sizeof(SysInfo));
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
void SpiWriteSysInfo(SysInfo *info)
|
||||
{
|
||||
SpiNorBurn(info, SYSINFOB_OFFSET, sizeof(SysInfo));
|
||||
SpiNorBurn(info, SYSINFOA_OFFSET, sizeof(SysInfo));
|
||||
}
|
||||
#endif
|
||||
1393
A58-AMTLDR/Src/SpinandBooter.c
Normal file
1393
A58-AMTLDR/Src/SpinandBooter.c
Normal file
File diff suppressed because it is too large
Load Diff
113
A58-AMTLDR/Src/UartPrint.c
Normal file
113
A58-AMTLDR/Src/UartPrint.c
Normal file
@ -0,0 +1,113 @@
|
||||
#include "amt630h.h"
|
||||
#include "typedef.h"
|
||||
#include "UartPrint.h"
|
||||
|
||||
void InitUart(unsigned int baud)
|
||||
{
|
||||
unsigned int Baud_Rate_Divisor;
|
||||
unsigned int val;
|
||||
|
||||
//select pad
|
||||
val = rSYS_PAD_CTRL02;
|
||||
val &= ~(0xF<<12);
|
||||
val |=(0x1<<14)|(0x1<<12);
|
||||
rSYS_PAD_CTRL02 = val;
|
||||
|
||||
Baud_Rate_Divisor = ((CLK_24MHZ<<3) + baud)/(baud<<1);
|
||||
rUART_IBRD = Baud_Rate_Divisor >> 6;
|
||||
rUART_FBRD = Baud_Rate_Divisor & 0x3f;
|
||||
|
||||
rUART_LCR_H = 0x70;//data len:8 bit,parity checking disable
|
||||
rUART_IFLS = 0x19;
|
||||
rUART_CR = 0x301;
|
||||
}
|
||||
|
||||
static char HexToChar(unsigned char value)
|
||||
{
|
||||
value &= 0x0f;
|
||||
|
||||
if ( value < 10 )
|
||||
return(0x30 + value);
|
||||
else
|
||||
return(0x60 + value - 9);
|
||||
}
|
||||
|
||||
|
||||
static void ShortToStr(unsigned short value, char *str)
|
||||
{
|
||||
str[0] = HexToChar(value >> 12);
|
||||
str[1] = HexToChar((value >> 8) & 0x0f);
|
||||
str[2] = HexToChar((value >> 4) & 0x0f);
|
||||
str[3] = HexToChar(value & 0x0f);
|
||||
str[4] = 0;
|
||||
}
|
||||
|
||||
void IntToStr(unsigned int value, char *str)
|
||||
{
|
||||
ShortToStr(value >> 16, str);
|
||||
ShortToStr(value & 0xffff, str + 4);
|
||||
str[8] = 0;
|
||||
}
|
||||
|
||||
void SendUartString(char * buf)
|
||||
{
|
||||
int i = 0;
|
||||
while ( buf[i] != 0)
|
||||
{
|
||||
while ( !(rUART_FR & 0x20) )
|
||||
{
|
||||
rUART_DR = buf[i++];
|
||||
if ( buf[i] == 0 )
|
||||
return;
|
||||
}
|
||||
while ( (rUART_FR & 0x20));
|
||||
}
|
||||
}
|
||||
|
||||
void SendUartChar(char ch)
|
||||
{
|
||||
while ( (rUART_FR & 0x20) );
|
||||
rUART_DR = ch;
|
||||
}
|
||||
|
||||
|
||||
void PrintVariableValueHex(char * variable, unsigned int value)
|
||||
{
|
||||
char buf[10];
|
||||
|
||||
SendUartString(variable);
|
||||
SendUartString(": 0x");
|
||||
IntToStr(value, buf);
|
||||
SendUartString(buf);
|
||||
SendUartString("\r\n");
|
||||
}
|
||||
|
||||
void SendUartWord(unsigned int data)
|
||||
{
|
||||
char buf[10];
|
||||
|
||||
SendUartString("0x");
|
||||
IntToStr(data, buf);
|
||||
SendUartString(buf);
|
||||
SendUartString("\r\n");
|
||||
}
|
||||
void uart_puts(const UINT8*buf)
|
||||
{
|
||||
INT32 i = 0;
|
||||
while ( buf[i] != 0)
|
||||
{
|
||||
while( !(rUART_FR & 0x20) )
|
||||
{
|
||||
if ( buf[i] == '\n' )
|
||||
{
|
||||
rUART_DR = '\r';
|
||||
while( (rUART_FR & 0x20) );
|
||||
}
|
||||
|
||||
rUART_DR = buf[i++];
|
||||
if ( buf[i] == 0 )
|
||||
return;
|
||||
}
|
||||
while( (rUART_FR & 0x20) );
|
||||
}
|
||||
}
|
||||
12
A58-AMTLDR/Src/UartPrint.h
Normal file
12
A58-AMTLDR/Src/UartPrint.h
Normal file
@ -0,0 +1,12 @@
|
||||
#ifndef UART_PRINT_H__
|
||||
#define UART_PRINT_H__
|
||||
|
||||
void InitUart(unsigned int baud);
|
||||
void SendUartString(char * buf);
|
||||
void SendUartChar(char ch);
|
||||
void PrintVariableValueHex(char * variable, unsigned int value);
|
||||
void SendUartWord(unsigned int data);
|
||||
void IntToStr(unsigned int value, char *str);
|
||||
|
||||
#endif
|
||||
|
||||
478
A58-AMTLDR/Src/amt630h.h
Normal file
478
A58-AMTLDR/Src/amt630h.h
Normal file
@ -0,0 +1,478 @@
|
||||
/***********************************************************************
|
||||
Copyright (c)2020 Arkmicro Technologies Inc. All Rights Reserved
|
||||
Filename: amt630h.h
|
||||
Version : 1.0
|
||||
Date : 2020.04.08
|
||||
Author : Sim. Huang
|
||||
History :
|
||||
************************************************************************/
|
||||
|
||||
#ifndef _AMT630H_H_
|
||||
#define _AMT630H_H_
|
||||
|
||||
#define VECTOR_ENABLE 0 //if you want to change this value, please
|
||||
//change the Assemble logic valuable VECTOR_ENABLE //in file Boot.s
|
||||
#define CLK_24MHZ 24000000
|
||||
#define CLK_12MHZ 12000000
|
||||
|
||||
|
||||
#define SPINOR_BOOTER_SD 0
|
||||
#define BOOT_FROM_USB 1
|
||||
#define SPINAND_BOOTER_SD 2
|
||||
#define BOOT_FROM_SPI 3
|
||||
|
||||
#define SPI_NOR_FLASH 0
|
||||
#define SPI_NAND_FLASH 1
|
||||
#define EMMC_FLASH 2
|
||||
#define DEVICE_TYPE_SELECT SPI_NOR_FLASH
|
||||
|
||||
/* register base address */
|
||||
|
||||
#define SDHC0_BASE 0x70400000
|
||||
#define USB_BASE 0x70300000//0x700C0000
|
||||
#define SSI1_BASE 0x60200000//0x48002000
|
||||
#define SSI0_BASE 0x60100000
|
||||
#define GPIO_BASE 0x60900000//0x40409000
|
||||
#define SYS_BASE 0x60000000//0x40408000
|
||||
#define TIMER_BASE 0x60a00000//0x40405000
|
||||
#define WDT_BASE 0x60c00000//0x40404000
|
||||
#define RTC_BASE 0x61000000//0x40406000
|
||||
#define UART0_BASE 0x60500000//0x4040B000
|
||||
|
||||
//uart
|
||||
#define UART_BASE UART0_BASE
|
||||
#define rUART_DR *((volatile unsigned int *)(UART_BASE + 0x00))
|
||||
#define rUART_RSR *((volatile unsigned int *)(UART_BASE + 0x04))
|
||||
#define rUART_FR *((volatile unsigned int *)(UART_BASE + 0x18))
|
||||
#define rUART_ILPR *((volatile unsigned int *)(UART_BASE + 0x20))
|
||||
#define rUART_IBRD *((volatile unsigned int *)(UART_BASE + 0x24))
|
||||
#define rUART_FBRD *((volatile unsigned int *)(UART_BASE + 0x28))
|
||||
#define rUART_LCR_H *((volatile unsigned int *)(UART_BASE + 0x2C))
|
||||
#define rUART_CR *((volatile unsigned int *)(UART_BASE + 0x30))
|
||||
#define rUART_IFLS *((volatile unsigned int *)(UART_BASE + 0x34))
|
||||
#define rUART_IMSC *((volatile unsigned int *)(UART_BASE + 0x38))
|
||||
#define rUART_RIS *((volatile unsigned int *)(UART_BASE + 0x3C))
|
||||
#define rUART_MIS *((volatile unsigned int *)(UART_BASE + 0x40))
|
||||
#define rUART_ICR *((volatile unsigned int *)(UART_BASE + 0x44))
|
||||
#define rUART_DMACR *((volatile unsigned int *)(UART_BASE + 0x48))
|
||||
|
||||
|
||||
/***************************************************************
|
||||
AHB slave interface registers definition
|
||||
****************************************************************/
|
||||
/* AHB system */
|
||||
#define rSYS_BOOT_SAMPLE *((volatile unsigned int *)(SYS_BASE+0x0))
|
||||
#define rSYS_BUS_CLK_SEL *((volatile unsigned int *)(SYS_BASE+0x40))
|
||||
#define rSYS_PLLRFCK_CTL *((volatile unsigned int *)(SYS_BASE+0x44))
|
||||
#define rSYS_SDMMC_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x48))
|
||||
#define rSYS_VOU_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x4c))
|
||||
#define rSYS_PER_CLK_EN *((volatile unsigned int *)(SYS_BASE+0x50))
|
||||
#define rSYS_LCD_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x54))
|
||||
#define rSYS_SD_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x58))
|
||||
#define rSYS_SOFT_RST *((volatile unsigned int *)(SYS_BASE+0x5c))
|
||||
#define rSYS_SOFT1_RST *((volatile unsigned int *)(SYS_BASE+0x60))
|
||||
#define rSYS_SSP_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x64))
|
||||
#define rSYS_TIMER_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x68))
|
||||
#define rSYS_I2S_NCO_CFG *((volatile unsigned int *)(SYS_BASE+0x6c))
|
||||
|
||||
#define rSYS_BUS_CLK1_SEL *((volatile unsigned int *)(SYS_BASE+0x140))
|
||||
#define rSYS_PER_CLK1_EN *((volatile unsigned int *)(SYS_BASE+0x144))
|
||||
#define rSYS_I2S1_NCO_CFG *((volatile unsigned int *)(SYS_BASE+0x148))
|
||||
|
||||
#define rSYS_DDRCTL_CFG *((volatile unsigned int *)(SYS_BASE+0x70))
|
||||
#define rSYS_DDRCTL1_CFG *((volatile unsigned int *)(SYS_BASE+0x74))
|
||||
#define rSYS_DDRCTL2_CFG *((volatile unsigned int *)(SYS_BASE+0xb0))
|
||||
#define rSYS_DDRCTL3_CFG *((volatile unsigned int *)(SYS_BASE+0xb4))
|
||||
#define rSYS_PERCTL_CFG *((volatile unsigned int *)(SYS_BASE+0x78))
|
||||
#define rSYS_TIMER1_CLK_CFG *((volatile unsigned int *)(SYS_BASE+0x7c))
|
||||
#define rSYS_ANA_CFG *((volatile unsigned int *)(SYS_BASE+0x80))
|
||||
#define rSYS_ANA1_CFG *((volatile unsigned int *)(SYS_BASE+0x84))
|
||||
#define rSYS_CPUPLL_CFG *((volatile unsigned int *)(SYS_BASE+0x88))
|
||||
#define rSYS_SYSPLL_CFG *((volatile unsigned int *)(SYS_BASE+0x8c))
|
||||
#define rSYS_DDRPLL_CFG *((volatile unsigned int *)(SYS_BASE+0x90))
|
||||
#define rSYS_VPUPLL_CFG *((volatile unsigned int *)(SYS_BASE+0x94))
|
||||
#define rSYS_ANA2_CFG *((volatile unsigned int *)(SYS_BASE+0x98))
|
||||
#define rSYS_ANA3_CFG *((volatile unsigned int *)(SYS_BASE+0x9c))
|
||||
#define rSYS_ANA4_CFG *((volatile unsigned int *)(SYS_BASE+0xa0))
|
||||
|
||||
|
||||
|
||||
#define rSYS_PAD_CTRL00 *((volatile unsigned int *)(SYS_BASE+0x30*4))
|
||||
#define rSYS_PAD_CTRL01 *((volatile unsigned int *)(SYS_BASE+0x31*4))
|
||||
#define rSYS_PAD_CTRL02 *((volatile unsigned int *)(SYS_BASE+0x32*4))
|
||||
#define rSYS_PAD_CTRL03 *((volatile unsigned int *)(SYS_BASE+0x33*4))
|
||||
#define rSYS_PAD_CTRL04 *((volatile unsigned int *)(SYS_BASE+0x34*4))
|
||||
#define rSYS_PAD_CTRL05 *((volatile unsigned int *)(SYS_BASE+0xD4))
|
||||
#define rSYS_PAD_CTRL06 *((volatile unsigned int *)(SYS_BASE+0x36*4))
|
||||
#define rSYS_PAD_CTRL07 *((volatile unsigned int *)(SYS_BASE+0x37*4))
|
||||
#define rSYS_PAD_CTRL08 *((volatile unsigned int *)(SYS_BASE+0x120))
|
||||
|
||||
|
||||
|
||||
#define rSYS_IO_DRIVER00 *((volatile unsigned int *)(SYS_BASE+0x38*4))
|
||||
#define rSYS_IO_DRIVER01 *((volatile unsigned int *)(SYS_BASE+0x39*4))
|
||||
#define rSYS_IO_DRIVER02 *((volatile unsigned int *)(SYS_BASE+0x3A*4))
|
||||
#define rSYS_IO_DRIVER03 *((volatile unsigned int *)(SYS_BASE+0x3B*4))
|
||||
#define rSYS_IO_DRIVER04 *((volatile unsigned int *)(SYS_BASE+0x3C*4))
|
||||
#define rSYS_IO_DRIVER05 *((volatile unsigned int *)(SYS_BASE+0x3D*4))
|
||||
#define rSYS_IO_DRIVER06 *((volatile unsigned int *)(SYS_BASE+0x3E*4))
|
||||
#define rSYS_IO_DRIVER07 *((volatile unsigned int *)(SYS_BASE+0x3F*4))
|
||||
|
||||
#define rSYS_IO_UP00 *((volatile unsigned int *)(SYS_BASE+0x40*4))
|
||||
#define rSYS_IO_UP01 *((volatile unsigned int *)(SYS_BASE+0x41*4))
|
||||
#define rSYS_IO_UP02 *((volatile unsigned int *)(SYS_BASE+0x42*4))
|
||||
#define rSYS_IO_UP03 *((volatile unsigned int *)(SYS_BASE+0x43*4))
|
||||
#define rSYS_IO_UP04 *((volatile unsigned int *)(SYS_BASE+0x44*4))
|
||||
#define rSYS_IO_UP05 *((volatile unsigned int *)(SYS_BASE+0x45*4))
|
||||
#define rSYS_IO_UP06 *((volatile unsigned int *)(SYS_BASE+0x46*4))
|
||||
#define rSYS_IO_UP07 *((volatile unsigned int *)(SYS_BASE+0x47*4))
|
||||
|
||||
/* Timer */
|
||||
#define rTIMER0_LOAD_COUNT (*(volatile unsigned int *)(TIMER_BASE + 0x00))
|
||||
#define rTIMER0_CURRENT_VALUE (*(volatile unsigned int *)(TIMER_BASE + 0x04))
|
||||
#define rTIMER0_CONTROL (*(volatile unsigned int *)(TIMER_BASE + 0x08))
|
||||
#define rTIMER0_EOI (*(volatile unsigned int *)(TIMER_BASE + 0x0C))
|
||||
#define rTIMER0_INT_STATUS (*(volatile unsigned int *)(TIMER_BASE + 0x10))
|
||||
|
||||
/* WDT */
|
||||
#define rWDT_CR (*(volatile unsigned int *)(WDT_BASE + 0x00))
|
||||
#define rWDT_PSR (*(volatile unsigned int *)(WDT_BASE + 0x04))
|
||||
#define rWDT_LDR (*(volatile unsigned int *)(WDT_BASE + 0x08))
|
||||
#define rWDT_VLR (*(volatile unsigned int *)(WDT_BASE + 0x0C))
|
||||
#define rWDT_ISR (*(volatile unsigned int *)(WDT_BASE + 0x10))
|
||||
#define rWDT_RCR (*(volatile unsigned int *)(WDT_BASE + 0x14))
|
||||
#define rWDT_TMR (*(volatile unsigned int *)(WDT_BASE + 0x18))
|
||||
#define rWDT_TCR (*(volatile unsigned int *)(WDT_BASE + 0x1C))
|
||||
|
||||
/* RTC */
|
||||
#define rRTC_CTL (*(volatile unsigned int *)(RTC_BASE + 0x00)) /*control register*/
|
||||
#define rRTC_ANAWEN (*(volatile unsigned int *)(RTC_BASE + 0x04)) /*analog block write enable register*/
|
||||
#define rRTC_ANACTL (*(volatile unsigned int *)(RTC_BASE + 0x08)) /*analog block control register*/
|
||||
#define rRTC_IM (*(volatile unsigned int *)(RTC_BASE + 0x0C)) /*interrupt mode register*/
|
||||
#define rRTC_STA (*(volatile unsigned int *)(RTC_BASE + 0x10)) /*rtc status register*/
|
||||
#define rRTC_ALMDAT (*(volatile unsigned int *)(RTC_BASE + 0x14)) /*alarm data register*/
|
||||
#define rRTC_DONT (*(volatile unsigned int *)(RTC_BASE + 0x18)) /*delay on timer register*/
|
||||
#define rRTC_RAM (*(volatile unsigned int *)(RTC_BASE + 0x1C)) /*ram bit register*/
|
||||
#define rRTC_CNTL (*(volatile unsigned int *)(RTC_BASE + 0x20)) /*rtc counter register*/
|
||||
#define rRTC_CNTH (*(volatile unsigned int *)(RTC_BASE + 0x24)) /*rtc sec counter register*/
|
||||
|
||||
/* UART0 */
|
||||
#define rUART0_DR (*(volatile unsigned int *)(UART0_BASE + 0x00))
|
||||
#define rUART0_RSR (*(volatile unsigned int *)(UART0_BASE + 0x04))
|
||||
#define rUART0_FR (*(volatile unsigned int *)(UART0_BASE + 0x18))
|
||||
#define rUART0_ILPR (*(volatile unsigned int *)(UART0_BASE + 0x20))
|
||||
#define rUART0_IBRD (*(volatile unsigned int *)(UART0_BASE + 0x24))
|
||||
#define rUART0_FBRD (*(volatile unsigned int *)(UART0_BASE + 0x28))
|
||||
#define rUART0_LCR_H (*(volatile unsigned int *)(UART0_BASE + 0x2C))
|
||||
#define rUART0_CR (*(volatile unsigned int *)(UART0_BASE + 0x30))
|
||||
#define rUART0_IFLS (*(volatile unsigned int *)(UART0_BASE + 0x34))
|
||||
#define rUART0_IMSC (*(volatile unsigned int *)(UART0_BASE + 0x38))
|
||||
#define rUART0_RIS (*(volatile unsigned int *)(UART0_BASE + 0x3C))
|
||||
#define rUART0_MIS (*(volatile unsigned int *)(UART0_BASE + 0x40))
|
||||
#define rUART0_ICR (*(volatile unsigned int *)(UART0_BASE + 0x44))
|
||||
#define rUART0_DMACR (*(volatile unsigned int *)(UART0_BASE + 0x48))
|
||||
|
||||
|
||||
/* SSI */
|
||||
#define rSPI_CONTROLREG (*(volatile unsigned int *)(SSI1_BASE + 0x08))
|
||||
#define rSPI_CONFIGREG (*(volatile unsigned int *)(SSI1_BASE + 0x0C))
|
||||
#define rSPI_INTREG (*(volatile unsigned int *)(SSI1_BASE + 0x10))
|
||||
#define rSPI_DMAREG (*(volatile unsigned int *)(SSI1_BASE + 0x14))
|
||||
#define rSPI_STATUSREG (*(volatile unsigned int *)(SSI1_BASE + 0x18))
|
||||
#define rSPI_PERIODREG (*(volatile unsigned int *)(SSI1_BASE + 0x1C))
|
||||
#define rSPI_TESTREG (*(volatile unsigned int *)(SSI1_BASE + 0x20))
|
||||
#define rSPI_MSGREG (*(volatile unsigned int *)(SSI1_BASE + 0x40))
|
||||
#define rSPI_RXDATA (*(volatile unsigned int *)(SSI1_BASE + 0x50))
|
||||
#define rSPI_TXDATA (*(volatile unsigned int *)(SSI1_BASE + 0x460))
|
||||
#define rSPI_TXFIFO (SSI_BASE + 0x460)
|
||||
#define rSPI_RXFIFO (SSI_BASE + 0x50)
|
||||
|
||||
/* SSI0 */
|
||||
#define rSPI_CTLR0 (*(volatile unsigned int *)(SSI0_BASE + 0x00))
|
||||
#define rSPI_CTLR1 (*(volatile unsigned int *)(SSI0_BASE + 0x04))
|
||||
#define rSPI_SSIENR (*(volatile unsigned int *)(SSI0_BASE + 0x08))
|
||||
#define rSPI_MWCR (*(volatile unsigned int *)(SSI0_BASE + 0x0c))
|
||||
#define rSPI_SER (*(volatile unsigned int *)(SSI0_BASE + 0x10))
|
||||
#define rSPI_BAUDR (*(volatile unsigned int *)(SSI0_BASE + 0x14))
|
||||
#define rSPI_TXFTLR (*(volatile unsigned int *)(SSI0_BASE + 0x18))
|
||||
#define rSPI_RXFTLR (*(volatile unsigned int *)(SSI0_BASE + 0x1C))
|
||||
#define rSPI_TXFLR (*(volatile unsigned int *)(SSI0_BASE + 0x20))
|
||||
#define rSPI_RXFLR (*(volatile unsigned int *)(SSI0_BASE + 0x24))
|
||||
#define rSPI_SR (*(volatile unsigned int *)(SSI0_BASE + 0x28))
|
||||
#define rSPI_IMR (*(volatile unsigned int *)(SSI0_BASE + 0x2C))
|
||||
#define rSPI_ISR (*(volatile unsigned int *)(SSI0_BASE + 0x30))
|
||||
#define rSPI_RISR (*(volatile unsigned int *)(SSI0_BASE + 0x34))
|
||||
#define rSPI_TXOICR (*(volatile unsigned int *)(SSI0_BASE + 0x38))
|
||||
#define rSPI_RXOICR (*(volatile unsigned int *)(SSI0_BASE + 0x3C))
|
||||
#define rSPI_RXUICR (*(volatile unsigned int *)(SSI0_BASE + 0x40))
|
||||
#define rSPI_MSTICR (*(volatile unsigned int *)(SSI0_BASE + 0x44))
|
||||
#define rSPI_ICR (*(volatile unsigned int *)(SSI0_BASE + 0x48))
|
||||
#define rSPI_DMACR (*(volatile unsigned int *)(SSI0_BASE + 0x4C))
|
||||
#define rSPI_DMATDLR (*(volatile unsigned int *)(SSI0_BASE + 0x50))
|
||||
#define rSPI_DMARDLR (*(volatile unsigned int *)(SSI0_BASE + 0x54))
|
||||
#define rSPI_IDR (*(volatile unsigned int *)(SSI0_BASE + 0x58))
|
||||
#define rSPI_SSI_COMP_VERSION (*(volatile unsigned int *)(SSI0_BASE + 0x5C))
|
||||
#define rSPI_DR (*(volatile unsigned int *)(SSI0_BASE + 0x60))
|
||||
#define SPI_DR (SSI0_BASE + 0x60)
|
||||
|
||||
#define rSPI_RX_SAMPLE_DLY (*(volatile unsigned int *)(SSI0_BASE + 0xf0))
|
||||
#define rSPI_SPI_CTRLR0 (*(volatile unsigned int *)(SSI0_BASE + 0xf4))
|
||||
//#define rSPI_RSVD_1 (*(volatile unsigned int *)(SSI0_BASE + 0xf8))
|
||||
//#define rSPI_RSVD_1 (*(volatile unsigned int *)(SSI0_BASE + 0xfC))
|
||||
|
||||
|
||||
|
||||
/* GPIO */
|
||||
#define rGPIO_PA_MOD (*(volatile unsigned int *)(GPIO_BASE + 0x00))
|
||||
#define rGPIO_PA_RDATA (*(volatile unsigned int *)(GPIO_BASE + 0x04))
|
||||
#define rGPIO_PA_INTEN (*(volatile unsigned int *)(GPIO_BASE + 0x08))
|
||||
#define rGPIO_PA_LEVEL (*(volatile unsigned int *)(GPIO_BASE + 0x0C))
|
||||
#define rGPIO_PA_PEND (*(volatile unsigned int *)(GPIO_BASE + 0x10))
|
||||
|
||||
#define rGPIO_PB_MOD (*(volatile unsigned int *)(GPIO_BASE + 0x20))
|
||||
#define rGPIO_PB_RDATA (*(volatile unsigned int *)(GPIO_BASE + 0x24))
|
||||
#define rGPIO_PB_INTEN (*(volatile unsigned int *)(GPIO_BASE + 0x28))
|
||||
#define rGPIO_PB_LEVEL (*(volatile unsigned int *)(GPIO_BASE + 0x2C))
|
||||
#define rGPIO_PB_PEND (*(volatile unsigned int *)(GPIO_BASE + 0x30))
|
||||
|
||||
#define rGPIO_PC_MOD (*(volatile unsigned int *)(GPIO_BASE + 0x40))
|
||||
#define rGPIO_PC_RDATA (*(volatile unsigned int *)(GPIO_BASE + 0x44))
|
||||
#define rGPIO_PC_INTEN (*(volatile unsigned int *)(GPIO_BASE + 0x48))
|
||||
#define rGPIO_PC_LEVEL (*(volatile unsigned int *)(GPIO_BASE + 0x4C))
|
||||
#define rGPIO_PC_PEND (*(volatile unsigned int *)(GPIO_BASE + 0x50))
|
||||
|
||||
#define rGPIO_PD_MOD (*(volatile unsigned int *)(GPIO_BASE + 0x60))
|
||||
#define rGPIO_PD_RDATA (*(volatile unsigned int *)(GPIO_BASE + 0x64))
|
||||
#define rGPIO_PD_INTEN (*(volatile unsigned int *)(GPIO_BASE + 0x68))
|
||||
#define rGPIO_PD_LEVEL (*(volatile unsigned int *)(GPIO_BASE + 0x6C))
|
||||
#define rGPIO_PD_PEND (*(volatile unsigned int *)(GPIO_BASE + 0x70))
|
||||
|
||||
|
||||
//DDR Reg
|
||||
|
||||
|
||||
#define DDR2_BASE 0x71300000
|
||||
|
||||
#define MEM_STA_REG (*(volatile unsigned int *)(DDR2_BASE + 0x00))
|
||||
#define MEM_CMD_REG (*(volatile unsigned int *)(DDR2_BASE + 0x04))
|
||||
#define DIR_CMD_REG (*(volatile unsigned int *)(DDR2_BASE + 0x08))
|
||||
#define MEM_CFG_REG (*(volatile unsigned int *)(DDR2_BASE + 0x0C))
|
||||
#define REF_PRD_REG (*(volatile unsigned int *)(DDR2_BASE + 0x10))
|
||||
#define TCAS_REG (*(volatile unsigned int *)(DDR2_BASE + 0x14))
|
||||
#define TWL_REG (*(volatile unsigned int *)(DDR2_BASE + 0x18))
|
||||
#define TMRD_REG (*(volatile unsigned int *)(DDR2_BASE + 0x1C))
|
||||
#define TRAS_REG (*(volatile unsigned int *)(DDR2_BASE + 0x20))
|
||||
#define TRC_REG (*(volatile unsigned int *)(DDR2_BASE + 0x24))
|
||||
#define TRCD_REG (*(volatile unsigned int *)(DDR2_BASE + 0x28))
|
||||
#define TRFC_REG (*(volatile unsigned int *)(DDR2_BASE + 0x2C))
|
||||
#define TRP_REG (*(volatile unsigned int *)(DDR2_BASE + 0x30))
|
||||
#define TRRD_REG (*(volatile unsigned int *)(DDR2_BASE + 0x34))
|
||||
#define TWR_REG (*(volatile unsigned int *)(DDR2_BASE + 0x38))
|
||||
#define TWTR_REG (*(volatile unsigned int *)(DDR2_BASE + 0x3C))
|
||||
#define TXP_REG (*(volatile unsigned int *)(DDR2_BASE + 0x40))
|
||||
#define TXSR_REG (*(volatile unsigned int *)(DDR2_BASE + 0x44))
|
||||
#define TESR_REG (*(volatile unsigned int *)(DDR2_BASE + 0x48))
|
||||
#define MEM_CFG2_REG (*(volatile unsigned int *)(DDR2_BASE + 0x4C))
|
||||
#define MEM_CFG3_REG (*(volatile unsigned int *)(DDR2_BASE + 0x50))
|
||||
#define TFAW_REG (*(volatile unsigned int *)(DDR2_BASE + 0x54))
|
||||
#define READ_DELAY_REG (*(volatile unsigned int *)(DDR2_BASE + 0x58))
|
||||
#define CHIP_CFG_REG (*(volatile unsigned int *)(DDR2_BASE + 0x200))
|
||||
#define FEA_CTL_REG (*(volatile unsigned int *)(DDR2_BASE + 0x30C))
|
||||
|
||||
|
||||
//#define MMU_ENABLE
|
||||
|
||||
#if DEVICE_TYPE_SELECT == SPI_NAND_FLASH
|
||||
#define LOADER_OFFSET 0x0
|
||||
#define LOADER_MAX_SIZE 0x4000
|
||||
|
||||
#define STEPLDRA_OFFSET 0x20000
|
||||
#define STEPLDRB_OFFSET 0x40000
|
||||
#define STEPLDR_MAX_SIZE 0x14000
|
||||
|
||||
#define SYSINFOA_OFFSET 0x60000
|
||||
#define SYSINFOB_OFFSET 0x80000
|
||||
#define SYSINFO_MAX_SIZE 0x1000
|
||||
|
||||
#define IMAGE_OFFSET 0xa0000
|
||||
#define IMAGE_READ_SIZE 0x20000
|
||||
|
||||
#define LOADER_FILE_NAME "spildr.bin"
|
||||
#define STEPLDR_FILE_NAME "stepldr.bin"
|
||||
#define APP_FILE_NAME "update.bin"
|
||||
|
||||
#elif DEVICE_TYPE_SELECT == SPI_NOR_FLASH
|
||||
#define LOADER_OFFSET 0x0
|
||||
#define LOADER_MAX_SIZE 0x4000
|
||||
|
||||
#define STEPLDRA_OFFSET 0x4000
|
||||
#define STEPLDRB_OFFSET 0x20000
|
||||
#define STEPLDR_MAX_SIZE 0x14000
|
||||
|
||||
#define SYSINFOA_OFFSET 0x3c000
|
||||
#define SYSINFOB_OFFSET 0x3e000
|
||||
#define SYSINFO_MAX_SIZE 0x1000
|
||||
|
||||
#define IMAGE_OFFSET 0x40000
|
||||
#define IMAGE_MAX_SIZE 0xf00000
|
||||
|
||||
#define LOADER_FILE_NAME "spildr.bin"
|
||||
#define STEPLDR_FILE_NAME "stepldr.bin"
|
||||
#define APP_FILE_NAME "update.bin"
|
||||
|
||||
#elif DEVICE_TYPE_SELECT == EMMC_FLASH
|
||||
/**********************************************************************************************
|
||||
emmc·ÖÇøÇé¿ö
|
||||
(0-------0x200000-------0x400000------0x500000---0xA00000-----0x40000000-----0x80000000-----end
|
||||
|------------|--------------|--------------|---------|-------------|----------- --|-----------|
|
||||
| | | | | | | |
|
||||
| EMMCLDR | stepldr | SYSINFO | log | app1 | app2 | ota |
|
||||
|____________|______________|______________|_________|_____________|______________|___________|
|
||||
|
||||
**********************************************************************************************/
|
||||
#define LOADER_OFFSET 0x0
|
||||
#define LOADERB_OFFSET 0x100000
|
||||
#define LOADER_MAX_SIZE 0x4000
|
||||
|
||||
#define STEPLDRA_OFFSET 0x200000
|
||||
#define STEPLDRB_OFFSET 0x300000
|
||||
#define STEPLDR_MAX_SIZE 0x14000
|
||||
|
||||
#define SYSINFOA_OFFSET 0x400000
|
||||
#define SYSINFOB_OFFSET 0x500000
|
||||
#define SYSINFO_MAX_SIZE 0x1000
|
||||
|
||||
#define IMAGE_OFFSET 0xA00000
|
||||
#define IMAGEB_OFFSET 0x40000000
|
||||
#define IMAGE_MAX_SIZE 0xf00000
|
||||
#define IMAGE_READ_SIZE 0x80000
|
||||
|
||||
#define LOADER_FILE_NAME "emmcldr.bin"
|
||||
#define STEPLDR_FILE_NAME "stepldr.bin"
|
||||
#define APP_FILE_NAME "update.bin"
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define IMAGE_ENTRY 0x30c000
|
||||
#define STEPLDR_ENTRY 0x20f00000
|
||||
#define IMAGE_FLAG 0x424b5244
|
||||
#define CheckImageValid (*((volatile unsigned int *)(IMAGE_ENTRY+4)) == IMAGE_FLAG)
|
||||
|
||||
typedef struct {
|
||||
unsigned int magic;
|
||||
unsigned int offset;
|
||||
unsigned int size;
|
||||
} UpFileInfo;
|
||||
|
||||
typedef struct {
|
||||
unsigned int magic;
|
||||
unsigned int filenum;
|
||||
unsigned int size;
|
||||
unsigned int checksum;
|
||||
unsigned int reserved1;
|
||||
unsigned int reserved2;
|
||||
UpFileInfo files[];
|
||||
} UpFileHeader;
|
||||
|
||||
#define ENOENT 2 /* No such file or directory */
|
||||
#define EIO 5 /* I/O error */
|
||||
#define ENXIO 6 /* No such device or address */
|
||||
#define ENOMEM 12 /* Out of memory */
|
||||
#define ENODEV 19 /* No such device */
|
||||
#define EINVAL 22 /* Invalid argument */
|
||||
#define EFBIG 27 /* File too large */
|
||||
#define ENOSPC 28 /* No space left on device */
|
||||
#define ENOTCONN 107 /* Transport endpoint is not connected */
|
||||
|
||||
|
||||
#define min(x,y) ((x) < (y) ? x : y)
|
||||
#define max(x,y) ((x) > (y) ? x : y)
|
||||
|
||||
|
||||
#define min3(x, y, z) min(min(x, y), z)
|
||||
#define max3(x, y, z) max(max(x, y), z)
|
||||
|
||||
#define ROUND(a,b) (((a) + (b) - 1) & ~((b) - 1))
|
||||
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
|
||||
|
||||
#define ALIGN(x,a) __ALIGN_MASK((x),(uintptr_t)(a)-1)
|
||||
#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
|
||||
|
||||
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
|
||||
|
||||
|
||||
#define ARCH_DMA_MINALIGN 32//64
|
||||
#define USB_DMA_MINALIGN ARCH_DMA_MINALIGN
|
||||
//typedef unsigned long uintptr_t;
|
||||
|
||||
#define PAD_COUNT(s, pad) (((s) - 1) / (pad) + 1)
|
||||
#define PAD_SIZE(s, pad) (PAD_COUNT(s, pad) * pad)
|
||||
#define ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, pad) \
|
||||
char __##name[ROUND(PAD_SIZE((size) * sizeof(type), pad), align) \
|
||||
+ (align - 1)]; \
|
||||
\
|
||||
type *name = (type *)ALIGN((uintptr_t)__##name, align)
|
||||
#define ALLOC_ALIGN_BUFFER(type, name, size, align) \
|
||||
ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, 1)
|
||||
#define ALLOC_CACHE_ALIGN_BUFFER_PAD(type, name, size, pad) \
|
||||
ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad)
|
||||
#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \
|
||||
ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
|
||||
|
||||
|
||||
static inline int ffs(int x)
|
||||
{
|
||||
int r = 1;
|
||||
|
||||
if (!x)
|
||||
return 0;
|
||||
if (!(x & 0xffff)) {
|
||||
x >>= 16;
|
||||
r += 16;
|
||||
}
|
||||
if (!(x & 0xff)) {
|
||||
x >>= 8;
|
||||
r += 8;
|
||||
}
|
||||
if (!(x & 0xf)) {
|
||||
x >>= 4;
|
||||
r += 4;
|
||||
}
|
||||
if (!(x & 3)) {
|
||||
x >>= 2;
|
||||
r += 2;
|
||||
}
|
||||
if (!(x & 1)) {
|
||||
x >>= 1;
|
||||
r += 1;
|
||||
}
|
||||
return r;
|
||||
}
|
||||
/*
|
||||
static void writeb(unsigned char val, void *ptr)
|
||||
{
|
||||
*(volatile unsigned char*)ptr = val;
|
||||
}
|
||||
|
||||
static unsigned char readb(void *ptr)
|
||||
{
|
||||
return *(volatile unsigned char*)ptr;
|
||||
}
|
||||
|
||||
static void writew(unsigned short val, void *ptr)
|
||||
{
|
||||
*(volatile unsigned short*)ptr = val;
|
||||
}
|
||||
|
||||
static unsigned short readw(void *ptr)
|
||||
{
|
||||
return *(volatile unsigned short*)ptr;
|
||||
}
|
||||
*/
|
||||
#define reg32_read(addr) *((volatile unsigned int *)(addr))
|
||||
#define reg32_write(addr,val) *((volatile unsigned int *)(addr)) = (val)
|
||||
#define readl(a) reg32_read(a)
|
||||
#define writel(v, a) reg32_write(a, v)
|
||||
|
||||
#endif // _AMT630H_H_
|
||||
124
A58-AMTLDR/Src/clockcfg.c
Normal file
124
A58-AMTLDR/Src/clockcfg.c
Normal file
@ -0,0 +1,124 @@
|
||||
#include "amt630h.h"
|
||||
|
||||
static void delay(volatile int count )
|
||||
{
|
||||
while(count--);
|
||||
}
|
||||
|
||||
void SetCpuPLL(unsigned int freq_mhz)
|
||||
{
|
||||
rSYS_CPUPLL_CFG &= ~(1<<14);
|
||||
delay(10);
|
||||
|
||||
rSYS_BUS_CLK1_SEL |= (1<< 0);
|
||||
rSYS_CPUPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
|
||||
}
|
||||
|
||||
void SetSysPLL(unsigned int freq_mhz)
|
||||
{
|
||||
rSYS_SYSPLL_CFG &= ~(1<<14);
|
||||
delay(10);
|
||||
|
||||
rSYS_BUS_CLK1_SEL |= (1<< 1);
|
||||
rSYS_SYSPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
|
||||
}
|
||||
|
||||
void SetDDRPLL(unsigned int freq_mhz)
|
||||
{
|
||||
rSYS_DDRPLL_CFG &= ~(1<<14);
|
||||
delay(10);
|
||||
|
||||
rSYS_BUS_CLK1_SEL |= (1<< 2);
|
||||
// rSYS_DDRPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
|
||||
rSYS_DDRPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<15);
|
||||
|
||||
// rSYS_DDRPLL_CFG = (freq_mhz/12)|(0x0C<<8)|(1<<14)|(1<<15);
|
||||
|
||||
delay(100);
|
||||
rSYS_DDRPLL_CFG |= (1<< 14);
|
||||
}
|
||||
|
||||
void SetVPUPLL(unsigned int freq_mhz)
|
||||
{
|
||||
rSYS_VPUPLL_CFG &= ~(1<<14);
|
||||
delay(10);
|
||||
|
||||
rSYS_BUS_CLK1_SEL |= (1<< 3);
|
||||
rSYS_VPUPLL_CFG = (freq_mhz/6)|(0x1C<<8)|(1<<14)|(1<<15);
|
||||
}
|
||||
|
||||
void SetXclkAHBclkAPBclk(void)
|
||||
{
|
||||
unsigned int val;
|
||||
unsigned int hclk2x_div;
|
||||
unsigned int apbclk_div;
|
||||
unsigned int main_hclk_sel;
|
||||
unsigned int main_hclk2x_sel;
|
||||
unsigned int cpuclk_div;
|
||||
unsigned int main_cpuclk_sel;
|
||||
unsigned int ddrclk2x_div;
|
||||
unsigned int main_ddrclk2x_sel;
|
||||
|
||||
main_cpuclk_sel = 1;
|
||||
cpuclk_div = 0;
|
||||
main_hclk2x_sel = 1;
|
||||
hclk2x_div = 0;
|
||||
main_hclk_sel = 1;
|
||||
apbclk_div = 1;
|
||||
ddrclk2x_div = 0;
|
||||
main_ddrclk2x_sel = 1;
|
||||
#if 0
|
||||
val = rSYS_BUS_CLK_SEL;
|
||||
val &=~(0xFFFFFFFF);
|
||||
val |= (main_cpuclk_sel<< 0) |(cpuclk_div << 2) | (main_hclk2x_sel << 8) | (hclk2x_div << 7) | (main_hclk_sel << 11) | (apbclk_div << 16);
|
||||
|
||||
rSYS_BUS_CLK_SEL = val;
|
||||
#endif
|
||||
|
||||
val = rSYS_BUS_CLK_SEL;
|
||||
val &=~(0xFFFFFFFF);
|
||||
val |= (main_cpuclk_sel<< 0) |(cpuclk_div << 2);
|
||||
rSYS_BUS_CLK_SEL = val;
|
||||
delay(2000);
|
||||
|
||||
val = rSYS_BUS_CLK_SEL;
|
||||
val |= (main_hclk2x_sel << 8) | (hclk2x_div << 10) | (main_hclk_sel << 15) | (apbclk_div << 16) | (main_ddrclk2x_sel << 24) | (ddrclk2x_div << 26);
|
||||
rSYS_BUS_CLK_SEL = val;
|
||||
delay(2000);
|
||||
|
||||
}
|
||||
void SetSpiclk(void)
|
||||
{
|
||||
unsigned int val;
|
||||
val = rSYS_SSP_CLK_CFG;
|
||||
val &=~(0x1F);
|
||||
val |= (1<< 4) |(4 << 0);
|
||||
rSYS_SSP_CLK_CFG = val;
|
||||
}
|
||||
|
||||
void SetGpuclk(void)
|
||||
{
|
||||
unsigned int val;
|
||||
val = rSYS_TIMER1_CLK_CFG;
|
||||
val &=~(0xfF);
|
||||
val |= (0<< 3) |(1<< 0); //00:syspll_clk, 01:cpupll_clk
|
||||
rSYS_TIMER1_CLK_CFG = val;
|
||||
}
|
||||
|
||||
void SetMfcclk(void)
|
||||
{
|
||||
unsigned int val;
|
||||
val = rSYS_TIMER_CLK_CFG;
|
||||
val &=~(0xfF<<8);
|
||||
val |= (0x00<< 11) |(0x1<< 8);
|
||||
rSYS_TIMER_CLK_CFG = val;
|
||||
}
|
||||
|
||||
|
||||
|
||||
void SwitchTo24MHz(void)
|
||||
{
|
||||
rSYS_BUS_CLK_SEL = 0;
|
||||
|
||||
delay(10);
|
||||
}
|
||||
365
A58-AMTLDR/Src/cp15.c
Normal file
365
A58-AMTLDR/Src/cp15.c
Normal file
@ -0,0 +1,365 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* SAM Software Package License
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2011, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
// Reg Reads Writes
|
||||
//----------------------------------------------------------------------------
|
||||
// 0 ID code Unpredictable
|
||||
// 0 cache type Unpredictable
|
||||
// 0 TCM status Unpredictable
|
||||
// 1 Control Control
|
||||
// 2 Translation table base Translation table base
|
||||
// 3 Domain access control Domain access control
|
||||
// 4 (Reserved)
|
||||
// 5 Data fault status Data fault status
|
||||
// 5 Instruction fault status Instruction fault status
|
||||
// 6 Fault address Fault address
|
||||
// 7 cache operations cache operations
|
||||
// 8 Unpredictable TLB operations
|
||||
// 9 cache lockdown cache lockdown
|
||||
// 9 TCM region TCM region
|
||||
// 10 TLB lockdown TLB lockdown
|
||||
// 11 (Reserved)
|
||||
// 12 (Reserved)
|
||||
// 13 FCSE PID FCSE PID
|
||||
// 13 Context ID Context ID
|
||||
// 14 (Reserved)
|
||||
// 15 Test configuration Test configuration
|
||||
//-----------------------------------------------------------------------------
|
||||
|
||||
|
||||
/** \page cp15_f CP15 Functions.
|
||||
*
|
||||
* \section CP15 function Usage
|
||||
*
|
||||
* Methods to manage the Coprocessor 15. Coprocessor 15, or System Control
|
||||
* Coprocessor CP15, is used to configure and control all the items in the
|
||||
* list below:
|
||||
* <ul>
|
||||
* <li> ARM core
|
||||
* <li> caches (Icache, Dcache and write buffer)
|
||||
* <li> TCM
|
||||
* <li> MMU
|
||||
* <li> Other system options
|
||||
* </ul>
|
||||
* \section Usage
|
||||
*
|
||||
* -# Enable or disable D cache with Enable_D_cache and Disable_D_cache
|
||||
* -# Enable or disable I cache with Enable_I_cache and Disable_I_cache
|
||||
*
|
||||
* Related files:\n
|
||||
* \ref cp15.h\n
|
||||
* \ref cp15.c.\n
|
||||
*/
|
||||
|
||||
/** \file */
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Headers
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#include "cp15.h"
|
||||
#include "UartPrint.h"
|
||||
|
||||
#if defined(__ICCARM__)
|
||||
#include <intrinsics.h>
|
||||
#endif
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global functions
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* \brief Check Instruction cache
|
||||
* \return 0 if I_cache disable, 1 if I_cache enable
|
||||
*/
|
||||
unsigned int CP15_IsIcacheEnabled(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
return ((control & (1 << CP15_I_BIT)) != 0);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Enable Instruction cache
|
||||
*/
|
||||
void CP15_EnableIcache(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
|
||||
// Check if cache is disabled
|
||||
if ((control & (1 << CP15_I_BIT)) == 0) {
|
||||
|
||||
control |= (1 << CP15_I_BIT);
|
||||
CP15_WriteControl(control);
|
||||
SendUartString("I cache enabled.\n\r");
|
||||
}
|
||||
else {
|
||||
|
||||
SendUartString("I cache is already enabled.\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Disable Instruction cache
|
||||
*/
|
||||
void CP15_DisableIcache(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
|
||||
// Check if cache is enabled
|
||||
if ((control & (1 << CP15_I_BIT)) != 0) {
|
||||
|
||||
control &= ~(1ul << CP15_I_BIT);
|
||||
CP15_WriteControl(control);
|
||||
SendUartString("I cache disabled.\n\r");
|
||||
}
|
||||
else {
|
||||
|
||||
SendUartString("I cache is already disabled.\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check MMU
|
||||
* \return 0 if MMU disable, 1 if MMU enable
|
||||
*/
|
||||
unsigned int CP15_IsMMUEnabled(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
return ((control & (1 << CP15_M_BIT)) != 0);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Enable MMU
|
||||
*/
|
||||
void CP15_EnableMMU(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
|
||||
// Check if MMU is disabled
|
||||
if ((control & (1 << CP15_M_BIT)) == 0) {
|
||||
|
||||
control |= (1 << CP15_M_BIT);
|
||||
CP15_WriteControl(control);
|
||||
SendUartString("MMU enabled.\n\r");
|
||||
}
|
||||
else {
|
||||
|
||||
SendUartString("MMU is already enabled.\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Disable MMU
|
||||
*/
|
||||
void CP15_DisableMMU(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
|
||||
// Check if MMU is enabled
|
||||
if ((control & (1 << CP15_M_BIT)) != 0) {
|
||||
|
||||
control &= ~(1ul << CP15_M_BIT);
|
||||
control &= ~(1ul << CP15_C_BIT);
|
||||
CP15_WriteControl(control);
|
||||
SendUartString("MMU disabled.\n\r");
|
||||
}
|
||||
else {
|
||||
|
||||
SendUartString("MMU is already disabled.\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Check D_cache
|
||||
* \return 0 if D_cache disable, 1 if D_cache enable (with MMU of course)
|
||||
*/
|
||||
unsigned int CP15_IsDcacheEnabled(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
return ((control & ((1 << CP15_C_BIT)||(1 << CP15_M_BIT))) != 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable Data cache
|
||||
*/
|
||||
void CP15_EnableDcache(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
|
||||
if( !CP15_IsMMUEnabled() ) {
|
||||
SendUartString("Do nothing: MMU not enabled\r\n");
|
||||
}
|
||||
else {
|
||||
// Check if cache is disabled
|
||||
if ((control & (1 << CP15_C_BIT)) == 0) {
|
||||
|
||||
control |= (1 << CP15_C_BIT);
|
||||
CP15_WriteControl(control);
|
||||
SendUartString("D cache enabled.\r\n");
|
||||
}
|
||||
else {
|
||||
|
||||
SendUartString("D cache is already enabled.\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable Data cache
|
||||
*/
|
||||
void CP15_DisableDcache(void)
|
||||
{
|
||||
unsigned int control;
|
||||
|
||||
control = CP15_ReadControl();
|
||||
|
||||
// Check if cache is enabled
|
||||
if ((control & (1 << CP15_C_BIT)) != 0) {
|
||||
|
||||
control &= ~(1ul << CP15_C_BIT);
|
||||
CP15_WriteControl(control);
|
||||
SendUartString("D cache disabled.\n\r");
|
||||
}
|
||||
else {
|
||||
|
||||
SendUartString("D cache is already disabled.\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Invalidate TLB
|
||||
*/
|
||||
void CP15_InvalidateTLB(void)
|
||||
{
|
||||
asm("MCR p15, 0, %0, c8, c3, 0" : : "r"(1));
|
||||
asm("DSB");
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Clean Data cache
|
||||
*/
|
||||
void CP15_CacheClean(uint8_t CacheType)
|
||||
{
|
||||
//assert(!CacheType);
|
||||
CP15_SelectDCache();
|
||||
|
||||
CP15_CleanDCacheBySetWay();
|
||||
asm("DSB");
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Invalidate D/Icache
|
||||
*/
|
||||
void CP15_CacheInvalidate(uint8_t CacheType)
|
||||
{
|
||||
if(CacheType)
|
||||
{
|
||||
CP15_SelectICache();
|
||||
CP15_InvalidateIcacheInnerSharable();
|
||||
asm("DSB");
|
||||
asm("ISB");
|
||||
}
|
||||
else
|
||||
{
|
||||
CP15_SelectDCache();
|
||||
CP15_InvalidateDcacheBySetWay();
|
||||
asm("DSB");
|
||||
asm("ISB");
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Flush(Clean and invalidate) Data cache
|
||||
*/
|
||||
void CP15_CacheFlush(uint8_t CacheType)
|
||||
{
|
||||
//assert(!CacheType);
|
||||
|
||||
CP15_SelectDCache();
|
||||
CP15_CleanInvalidateDCacheBySetWay();
|
||||
|
||||
asm("DSB");
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Invalidate Data cache by address
|
||||
*/
|
||||
void CP15_InvalidateDCacheByVA(uint32_t S_Add, uint32_t E_Add)
|
||||
{
|
||||
|
||||
CP15_SelectDCache();
|
||||
CP15_InvalidateDcacheByMva(S_Add, E_Add);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clean Data cache by address
|
||||
*/
|
||||
void CP15_CleanDCacheByVA(uint32_t S_Add, uint32_t E_Add)
|
||||
{
|
||||
|
||||
CP15_SelectDCache();
|
||||
CP15_CleanDCacheByMva(S_Add, E_Add);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Flush Data cache by address
|
||||
*/
|
||||
|
||||
void CP15_FlushDCacheByVA(uint32_t S_Add, uint32_t E_Add)
|
||||
{
|
||||
|
||||
CP15_SelectDCache();
|
||||
CP15_CleanInvalidateDcacheByMva(S_Add, E_Add);
|
||||
}
|
||||
166
A58-AMTLDR/Src/cp15.h
Normal file
166
A58-AMTLDR/Src/cp15.h
Normal file
@ -0,0 +1,166 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* SAM Software Package License
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2011, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef _CP15_H
|
||||
#define _CP15_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Definition
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define CP15_L4_BIT 15 // Determines if the T bit is set when load instructions
|
||||
// change the PC:
|
||||
// 0 = loads to PC set the T bit
|
||||
// 1 = loads to PC do not set T bit
|
||||
|
||||
#define CP15_RR_BIT 14 // RR bit Replacement strategy for Icache and Dcache:
|
||||
// 0 = Random replacement
|
||||
// 1 = Round-robin replacement.
|
||||
|
||||
#define CP15_V_BIT 13 // V bit Location of exception vectors:
|
||||
// 0 = Normal exception vectors selected address range = 0x0000 0000 to 0x0000 001C
|
||||
// 1 = High exception vect selected, address range = 0xFFFF 0000 to 0xFFFF 001C
|
||||
|
||||
#define CP15_I_BIT 12 // I bit Icache enable/disable:
|
||||
// 0 = Icache disabled
|
||||
// 1 = Icache enabled
|
||||
|
||||
#define CP15_R_BIT 9 // R bit ROM protection
|
||||
|
||||
#define CP15_S_BIT 8 // S bit System protection
|
||||
|
||||
#define CP15_B_BIT 7 // B bit Endianness:
|
||||
// 0 = Little-endian operation
|
||||
// 1 = Big-endian operation.
|
||||
|
||||
#define CP15_C_BIT 2 // C bit Dcache enable/disable:
|
||||
// 0 = cache disabled
|
||||
// 1 = cache enabled
|
||||
|
||||
#define CP15_A_BIT 1 // A bit Alignment fault enable/disable:
|
||||
// 0 = Data address alignment fault checking disabled
|
||||
// 1 = Data address alignment fault checking enabled
|
||||
|
||||
#define CP15_M_BIT 0 // M bit MMU enable/disable: 0 = disabled 1 = enabled.
|
||||
// 0 = disabled
|
||||
// 1 = enabled
|
||||
|
||||
/** No access Any access generates a domain fault. */
|
||||
#define CP15_DOMAIN_NO_ACCESS 0x00
|
||||
/** Client Accesses are checked against the access permission bits in the section or page descriptor. */
|
||||
#define CP15_DOMAIN_CLIENT_ACCESS 0x01
|
||||
/** Manager Accesses are not checked against the access permission bits so a permission fault cannot be generated. */
|
||||
#define CP15_DOMAIN_MANAGER_ACCESS 0x03
|
||||
|
||||
|
||||
#define CP15_ICache 1
|
||||
#define CP15_DCache 0
|
||||
|
||||
#define CP15_PMCNTENSET_ENABLE 31
|
||||
#define CP15_PMCR_DIVIDER 3
|
||||
#define CP15_PMCR_RESET 2
|
||||
#define CP15_PMCR_ENABLE 0
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------ */
|
||||
/* Exported functions */
|
||||
/*------------------------------------------------------------------------------ */
|
||||
extern unsigned int CP15_ReadID(void);
|
||||
extern unsigned int CP15_ReadControl(void);
|
||||
extern void CP15_ExclusiveCache(void);
|
||||
extern void CP15_NonExclusiveCache(void);
|
||||
extern void CP15_ISB(void);
|
||||
extern void CP15_DSB(void);
|
||||
extern void CP15_DMB(void);
|
||||
extern void CP15_SelectDCache(void);
|
||||
extern void CP15_SelectICache(void);
|
||||
extern void CP15_WriteControl(unsigned int value);
|
||||
extern void CP15_WriteTTB(unsigned int value);
|
||||
extern void CP15_WriteDomainAccessControl(unsigned int value);
|
||||
|
||||
extern void CP15_InvalidateIcacheInnerSharable(void);
|
||||
extern void CP15_InvalidateBTBinnerSharable(void);
|
||||
extern void CP15_InvalidateIcache(void);
|
||||
extern void CP15_InvalidateIcacheByMva(void);
|
||||
extern void CP15_InvalidateBTB(void);
|
||||
extern void CP15_InvalidateBTBbyMva(uint32_t VA_Addr);
|
||||
|
||||
extern void CP15_InvalidateDcacheBySetWay(void);
|
||||
extern void CP15_CleanDCacheBySetWay(void);
|
||||
extern void CP15_CleanInvalidateDCacheBySetWay(void);
|
||||
|
||||
extern void CP15_InvalidateDcacheByMva(uint32_t startAddr, uint32_t endAddr );
|
||||
extern void CP15_CleanDCacheByMva(uint32_t startAddr, uint32_t endAddr );
|
||||
extern void CP15_CleanInvalidateDcacheByMva(uint32_t startAddr, uint32_t endAddr );
|
||||
|
||||
extern void CP15_CleanDCacheUMva(void);
|
||||
extern void CP15_InvalidateTranslationTable(void);
|
||||
|
||||
extern void CP15_coherent_dcache_for_dma (uint32_t startAddr, uint32_t endAddr );
|
||||
extern void CP15_invalidate_dcache_for_dma (uint32_t startAddr, uint32_t endAddr );
|
||||
extern void CP15_clean_dcache_for_dma (uint32_t startAddr, uint32_t endAddr );
|
||||
extern void CP15_flush_dcache_for_dma (uint32_t startAddr, uint32_t endAddr );
|
||||
extern void CP15_flush_kern_dcache_for_dma (uint32_t startAddr, uint32_t size );
|
||||
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------ */
|
||||
/* Exported functions from CP15.c */
|
||||
/*------------------------------------------------------------------------------ */
|
||||
|
||||
/** MMU (Status/Enable/Disable) */
|
||||
extern unsigned int CP15_IsMMUEnabled(void);
|
||||
extern void CP15_EnableMMU(void);
|
||||
extern void CP15_DisableMMU(void);
|
||||
|
||||
/** I cache (Status/Enable/Disable) */
|
||||
extern unsigned int CP15_IsIcacheEnabled(void);
|
||||
extern void CP15_EnableIcache(void);
|
||||
extern void CP15_DisableIcache(void);
|
||||
|
||||
/** D cache (Status/Enable/Disable) */
|
||||
extern unsigned int CP15_IsDcacheEnabled(void);
|
||||
extern void CP15_EnableDcache(void);
|
||||
extern void CP15_DisableDcache(void);
|
||||
|
||||
|
||||
extern void CP15_InvalidateTLB(void);
|
||||
|
||||
|
||||
extern void CP15_CacheClean(uint8_t CacheType);
|
||||
extern void CP15_CacheInvalidate(uint8_t CacheType);
|
||||
extern void CP15_CacheFlush(uint8_t CacheType);
|
||||
extern void CP15_InvalidateDCacheByVA(uint32_t S_Add, uint32_t E_Add);
|
||||
extern void CP15_CleanDCacheByVA(uint32_t S_Add, uint32_t E_Add);
|
||||
extern void CP15_FlushDCacheByVA(uint32_t S_Add, uint32_t E_Add);
|
||||
|
||||
#endif // #ifndef _CP15_H
|
||||
|
||||
728
A58-AMTLDR/Src/cp15_asm_iar.s
Normal file
728
A58-AMTLDR/Src/cp15_asm_iar.s
Normal file
@ -0,0 +1,728 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* SAM Software Package License
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2012, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES// LOSS OF USE, DATA,
|
||||
* OR PROFITS// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
/** \file */
|
||||
|
||||
|
||||
/**
|
||||
* \addtogroup cp15_cache Cache Operations
|
||||
*
|
||||
* \section Usage
|
||||
*
|
||||
* They are performed as MCR instructions and only operate on a level 1 cache associated with
|
||||
* ATM v7 processor.
|
||||
* The supported operations are:
|
||||
* <ul>
|
||||
* <li> Any of these operations can be applied to
|
||||
* -# any data cache
|
||||
* -# any unified cache.
|
||||
* <li> Invalidate by MVA
|
||||
* Performs an invalidate of a data or unified cache line based on the address it contains.
|
||||
* <li> Invalidate by set/way
|
||||
* Performs an invalidate of a data or unified cache line based on its location in the cache hierarchy.
|
||||
* <li> Clean by MVA
|
||||
* Performs a clean of a data or unified cache line based on the address it contains.
|
||||
* <li> Clean by set/way
|
||||
* Performs a clean of a data or unified cache line based on its location in the cache hierarchy.
|
||||
* <li> Clean and Invalidate by MVA
|
||||
* Performs a clean and invalidate of a data or unified cache line based on the address it contains.
|
||||
* <li> Clean and Invalidate by set/way
|
||||
* Performs a clean and invalidate of a data or unified cache line based on its location in the cache hierarchy.
|
||||
* </ul>
|
||||
*
|
||||
* Related files:\n
|
||||
* \ref cp15.h\n
|
||||
* \ref cp15_arm_iar.s \n
|
||||
*/
|
||||
|
||||
|
||||
MODULE ?cp15
|
||||
|
||||
//// Forward declaration of sections.
|
||||
SECTION IRQ_STACK:DATA:NOROOT(2)
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Headers
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define __ASSEMBLY__
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions to access CP15 coprocessor register
|
||||
*----------------------------------------------------------------------------*/
|
||||
PUBLIC CP15_ReadID
|
||||
PUBLIC CP15_ExclusiveCache
|
||||
PUBLIC CP15_NonExclusiveCache
|
||||
PUBLIC CP15_ISB
|
||||
PUBLIC CP15_DSB
|
||||
PUBLIC CP15_DMB
|
||||
PUBLIC CP15_SelectICache
|
||||
PUBLIC CP15_SelectDCache
|
||||
PUBLIC CP15_ReadControl
|
||||
PUBLIC CP15_WriteControl
|
||||
PUBLIC CP15_WriteDomainAccessControl
|
||||
PUBLIC CP15_WriteTTB
|
||||
PUBLIC CP15_InvalidateIcacheInnerSharable
|
||||
PUBLIC CP15_InvalidateBTBinnerSharable
|
||||
PUBLIC CP15_InvalidateIcache
|
||||
PUBLIC CP15_InvalidateIcacheByMva
|
||||
PUBLIC CP15_InvalidateBTB
|
||||
PUBLIC CP15_InvalidateBTBbyMva
|
||||
|
||||
PUBLIC CP15_InvalidateDcacheBySetWay
|
||||
PUBLIC CP15_CleanDCacheBySetWay
|
||||
PUBLIC CP15_CleanInvalidateDCacheBySetWay
|
||||
|
||||
PUBLIC CP15_InvalidateDcacheByMva
|
||||
PUBLIC CP15_CleanDCacheByMva
|
||||
PUBLIC CP15_CleanDCacheUMva
|
||||
PUBLIC CP15_CleanInvalidateDcacheByMva
|
||||
PUBLIC CP15_InvalidateTranslationTable
|
||||
|
||||
PUBLIC CP15_coherent_dcache_for_dma
|
||||
PUBLIC CP15_invalidate_dcache_for_dma
|
||||
PUBLIC CP15_clean_dcache_for_dma
|
||||
PUBLIC CP15_flush_dcache_for_dma
|
||||
PUBLIC CP15_flush_kern_dcache_for_dma
|
||||
|
||||
/**
|
||||
* \brief Register c0 accesses the ID Register, Cache Type Register, and TCM Status Registers.
|
||||
* Reading from this register returns the device ID, the cache type, or the TCM status
|
||||
* depending on the value of Opcode_2 used.
|
||||
*/
|
||||
SECTION .CP15_ReadID:DATA:NOROOT(2)
|
||||
PUBLIC CP15_ReadID
|
||||
CP15_ReadID:
|
||||
mov r0, #0
|
||||
mrc p15, 0, r0, c0, c0, 0
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Register c7 accesses the ACTLR Register, to indicate cpu that L2 is in exclusive mode
|
||||
*/
|
||||
SECTION .CP15_ISB:DATA:NOROOT(2)
|
||||
PUBLIC CP15_ISB
|
||||
CP15_ISB:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c5, 4
|
||||
nop
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Register c7 accesses the ACTLR Register, to indicate cpu that L2 is in exclusive mode
|
||||
*/
|
||||
SECTION .CP15_DSB:DATA:NOROOT(2)
|
||||
PUBLIC CP15_DSB
|
||||
CP15_DSB:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c10, 4
|
||||
nop
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Register c7 accesses the ACTLR Register, to indicate cpu that L2 is in exclusive mode
|
||||
*/
|
||||
SECTION .CP15_DMB:DATA:NOROOT(2)
|
||||
PUBLIC CP15_DMB
|
||||
CP15_DMB:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c10, 5
|
||||
nop
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Register c1 accesses the ACTLR Register, to indicate cpu that L2 is in exclusive mode
|
||||
*/
|
||||
SECTION .CP15_ExclusiveCache:DATA:NOROOT(2)
|
||||
PUBLIC CP15_ExclusiveCache
|
||||
CP15_ExclusiveCache:
|
||||
mov r0, #0
|
||||
mrc p15, 0, r0, c1, c0, 1 ; Read ACTLR
|
||||
orr r0, r0, #0x00000080
|
||||
mcr p15, 0, r0, c1, c0, 1 ; Write ACTLR
|
||||
nop
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Register c1 accesses the ACTLR Register, to indicate cpu that L2 is in exclusive mode
|
||||
*/
|
||||
SECTION .CP15_NonExclusiveCache:DATA:NOROOT(2)
|
||||
PUBLIC CP15_NonExclusiveCache
|
||||
CP15_NonExclusiveCache:
|
||||
mov r0, #0
|
||||
mrc p15, 0, r0, c1, c0, 1 ; Read ACTLR
|
||||
bic r0, r0, #0x00000080
|
||||
mcr p15, 0, r0, c1, c0, 1 ; Write ACTLR
|
||||
nop
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Register c1 accesses the CSSELR Register, to select ICache
|
||||
*/
|
||||
SECTION .CP15_SelectICache:DATA:NOROOT(2)
|
||||
PUBLIC CP15_SelectICache
|
||||
CP15_SelectICache:
|
||||
mrc p15, 2, r0, c0, c0, 0 ; Read CSSELR
|
||||
orr r0, r0, #0x1 ; Change 0th bit to ICache
|
||||
mcr p15, 2, r0, c0, c0, 0 ; Write CSSELR
|
||||
nop
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Register c1 accesses the CSSELR Register, to select DCache
|
||||
*/
|
||||
SECTION .CP15_SelectDCache:DATA:NOROOT(2)
|
||||
PUBLIC CP15_SelectDCache
|
||||
CP15_SelectDCache:
|
||||
mrc p15, 2, r0, c0, c0, 0 ; Read CSSELR
|
||||
and r0, r0, #0xFFFFFFFE ; Change 0th bit to ICache
|
||||
mcr p15, 2, r0, c0, c0, 0 ; Write CSSELR
|
||||
nop
|
||||
bx lr
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* \brief Register c1 is the Control Register for the ARM926EJ-S processor.
|
||||
* This register specifies the configuration used to enable and disable the
|
||||
* caches and MMU. It is recommended that you access this register using a
|
||||
* read-modify-write sequence
|
||||
*/
|
||||
SECTION .CP15_ReadControl:CODE:NOROOT(2)
|
||||
PUBLIC CP15_ReadControl
|
||||
CP15_ReadControl:
|
||||
mov r0, #0
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bx lr
|
||||
|
||||
SECTION .CP15_WriteControl:CODE:NOROOT(2)
|
||||
PUBLIC CP15_WriteControl
|
||||
CP15_WriteControl:
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
SECTION .CP15_WriteDomainAccessControl:CODE:NOROOT(2)
|
||||
PUBLIC CP15_WriteDomainAccessControl
|
||||
CP15_WriteDomainAccessControl:
|
||||
mcr p15, 0, r0, c3, c0, 0
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief ARMv7A architecture supports two translation tables
|
||||
* Configure translation table base (TTB) control register cp15,c2
|
||||
* to a value of all zeros, indicates we are using TTB register 0.
|
||||
* write the address of our page table base to TTB register 0.
|
||||
*/
|
||||
SECTION .CP15_WriteTTB:CODE:NOROOT(2)
|
||||
PUBLIC CP15_WriteTTB
|
||||
CP15_WriteTTB:
|
||||
mcr p15, 0, r0, c2, c0, 0
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Invalidate I cache predictor array inner Sharable
|
||||
*/
|
||||
SECTION .CP15_InvalidateIcacheInnerSharable:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateIcacheInnerSharable
|
||||
CP15_InvalidateIcacheInnerSharable:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c1, 0
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Invalidate entire branch predictor array inner Sharable
|
||||
*/
|
||||
SECTION .CP15_InvalidateBTBinnerSharable:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateBTBinnerSharable
|
||||
CP15_InvalidateBTBinnerSharable:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c1, 6
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Invalidate all instruction caches to PoU, also flushes branch target cache
|
||||
*/
|
||||
SECTION .CP15_InvalidateIcache:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateIcache
|
||||
CP15_InvalidateIcache:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c5, 0
|
||||
isb
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Invalidate instruction caches by VA to PoU
|
||||
*/
|
||||
SECTION .CP15_InvalidateIcacheByMva:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateIcacheByMva
|
||||
CP15_InvalidateIcacheByMva:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c5, 1
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Invalidate entire branch predictor array
|
||||
*/
|
||||
SECTION .CP15_InvalidateBTB:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateBTB
|
||||
CP15_InvalidateBTB:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c5, 6
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Invalidate branch predictor array entry by MVA
|
||||
*/
|
||||
SECTION .CP15_InvalidateBTBbyMva:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateBTBbyMva
|
||||
CP15_InvalidateBTBbyMva:
|
||||
mcr p15, 0, r0, c7, c5, 7
|
||||
bx lr
|
||||
|
||||
/***********************************************************
|
||||
*
|
||||
* ===Data Cache related maintenance functions===
|
||||
*
|
||||
**************************************************************/
|
||||
|
||||
|
||||
// ===Data Cache maintenance by SetWay ===
|
||||
|
||||
/**
|
||||
* \brief Invalidate entire data cache by set/way
|
||||
*/
|
||||
SECTION .CP15_InvalidateDcacheBySetWay:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateDcacheBySetWay
|
||||
CP15_InvalidateDcacheBySetWay:
|
||||
MRC p15, 1, r0, c0, c0, 1 ; Read CLIDR
|
||||
ANDS r3, r0, #0x07000000 ; Extract coherency level
|
||||
MOV r3, r3, LSR #23 ; Total cache levels << 1
|
||||
BEQ inv_finish ; If 0, no need to clean
|
||||
|
||||
MOV r10, #0 ; R10 holds current cache level << 1
|
||||
inv_cache_level_loop
|
||||
ADD r2, r10, r10, LSR #1 ; R2 holds cache "Set" position
|
||||
MOV r1, r0, LSR r2 ; Bottom 3 bits are the Cache-type for this level
|
||||
AND r1, r1, #7 ; Isolate those lower 3 bits
|
||||
CMP r1, #2
|
||||
BLT inv_skip ; No cache or only instruction cache at this level
|
||||
|
||||
MCR p15, 2, r10, c0, c0, 0 ; Write the Cache Size selection register
|
||||
ISB ; ISB to sync the change to the CacheSizeID reg
|
||||
MRC p15, 1, r1, c0, c0, 0 ; Reads current Cache Size ID register
|
||||
AND r2, r1, #7 ; Extract the line length field
|
||||
ADD r2, r2, #4 ; Add 4 for the line length offset (log2 16 bytes)
|
||||
LDR r4, =0x3FF
|
||||
ANDS r4, r4, r1, LSR #3 ; R4 is the max number on the way size (right aligned)
|
||||
CLZ r5, r4 ; R5 is the bit position of the way size increment
|
||||
LDR r7, =0x7FFF
|
||||
ANDS r7, r7, r1, LSR #13 ; R7 is the max number of the index size (right aligned)
|
||||
|
||||
inv_set_loop
|
||||
MOV r9, r4 ; R9 working copy of the max way size (right aligned)
|
||||
|
||||
inv_way_loop
|
||||
ORR r11, r10, r9, LSL r5 ; Factor in the Way number and cache number into R11
|
||||
ORR r11, r11, r7, LSL r2 ; Factor in the Set number
|
||||
MCR p15, 0, r11, c7, c6, 2 ; Invalidate by Set/Way
|
||||
SUBS r9, r9, #1 ; Decrement the Way number
|
||||
BGE inv_way_loop
|
||||
SUBS r7, r7, #1 ; Decrement the Set number
|
||||
BGE inv_set_loop
|
||||
inv_skip
|
||||
ADD r10, r10, #2 ; increment the cache number
|
||||
CMP r3, r10
|
||||
BGT inv_cache_level_loop
|
||||
inv_finish
|
||||
NOP
|
||||
BX lr
|
||||
|
||||
/**
|
||||
* \brief Clean entire data cache by set/way
|
||||
*/
|
||||
SECTION .CP15_CleanDCacheBySetWay:CODE:NOROOT(2)
|
||||
PUBLIC CP15_CleanDCacheBySetWay
|
||||
CP15_CleanDCacheBySetWay:
|
||||
MRC p15, 1, r0, c0, c0, 1 ; Read CLIDR
|
||||
ANDS r3, r0, #0x07000000 ; Extract coherency level
|
||||
MOV r3, r3, LSR #23 ; Total cache levels << 1
|
||||
BEQ clean_finish ; If 0, no need to clean
|
||||
|
||||
MOV r10, #0 ; R10 holds current cache level << 1
|
||||
clean_cache_level_loop
|
||||
ADD r2, r10, r10, LSR #1 ; R2 holds cache "Set" position
|
||||
MOV r1, r0, LSR r2 ; Bottom 3 bits are the Cache-type for this level
|
||||
AND r1, r1, #7 ; Isolate those lower 3 bits
|
||||
CMP r1, #2
|
||||
BLT clean_skip ; No cache or only instruction cache at this level
|
||||
|
||||
MCR p15, 2, r10, c0, c0, 0 ; Write the Cache Size selection register
|
||||
ISB ; ISB to sync the change to the CacheSizeID reg
|
||||
MRC p15, 1, r1, c0, c0, 0 ; Reads current Cache Size ID register
|
||||
AND r2, r1, #7 ; Extract the line length field
|
||||
ADD r2, r2, #4 ; Add 4 for the line length offset (log2 16 bytes)
|
||||
LDR r4, =0x3FF
|
||||
ANDS r4, r4, r1, LSR #3 ; R4 is the max number on the way size (right aligned)
|
||||
CLZ r5, r4 ; R5 is the bit position of the way size increment
|
||||
LDR r7, =0x7FFF
|
||||
ANDS r7, r7, r1, LSR #13 ; R7 is the max number of the index size (right aligned)
|
||||
|
||||
clean_set_loop
|
||||
MOV r9, r4 ; R9 working copy of the max way size (right aligned)
|
||||
|
||||
clean_way_loop
|
||||
ORR r11, r10, r9, LSL r5 ; Factor in the Way number and cache number into R11
|
||||
ORR r11, r11, r7, LSL r2 ; Factor in the Set number
|
||||
MCR p15, 0, r11, c7, c10, 2 ; Clean by Set/Way
|
||||
SUBS r9, r9, #1 ; Decrement the Way number
|
||||
BGE clean_way_loop
|
||||
SUBS r7, r7, #1 ; Decrement the Set number
|
||||
BGE clean_set_loop
|
||||
clean_skip
|
||||
ADD r10, r10, #2 ; increment the cache number
|
||||
CMP r3, r10
|
||||
BGT clean_cache_level_loop
|
||||
clean_finish
|
||||
NOP
|
||||
BX lr
|
||||
|
||||
/**
|
||||
* \brief Clean and Invalidate entire data cache by set/way
|
||||
*/
|
||||
SECTION .CP15_CleanInvalidateDCacheBySetWay:CODE:NOROOT(2)
|
||||
PUBLIC CP15_CleanInvalidateDCacheBySetWay
|
||||
CP15_CleanInvalidateDCacheBySetWay:
|
||||
MRC p15, 1, r0, c0, c0, 1 ; Read CLIDR
|
||||
ANDS r3, r0, #0x07000000 ; Extract coherency level
|
||||
MOV r3, r3, LSR #23 ; Total cache levels << 1
|
||||
BEQ clinv_finish ; If 0, no need to clean
|
||||
|
||||
MOV r10, #0 ; R10 holds current cache level << 1
|
||||
clinv_cache_level_loop
|
||||
ADD r2, r10, r10, LSR #1 ; R2 holds cache "Set" position
|
||||
MOV r1, r0, LSR r2 ; Bottom 3 bits are the Cache-type for this level
|
||||
AND r1, r1, #7 ; Isolate those lower 3 bits
|
||||
CMP r1, #2
|
||||
BLT clean_skip ; No cache or only instruction cache at this level
|
||||
|
||||
MCR p15, 2, r10, c0, c0, 0 ; Write the Cache Size selection register
|
||||
ISB ; ISB to sync the change to the CacheSizeID reg
|
||||
MRC p15, 1, r1, c0, c0, 0 ; Reads current Cache Size ID register
|
||||
AND r2, r1, #7 ; Extract the line length field
|
||||
ADD r2, r2, #4 ; Add 4 for the line length offset (log2 16 bytes)
|
||||
LDR r4, =0x3FF
|
||||
ANDS r4, r4, r1, LSR #3 ; R4 is the max number on the way size (right aligned)
|
||||
CLZ r5, r4 ; R5 is the bit position of the way size increment
|
||||
LDR r7, =0x7FFF
|
||||
ANDS r7, r7, r1, LSR #13 ; R7 is the max number of the index size (right aligned)
|
||||
|
||||
clinv_set_loop
|
||||
MOV r9, r4 ; R9 working copy of the max way size (right aligned)
|
||||
|
||||
clinv_way_loop
|
||||
ORR r11, r10, r9, LSL r5 ; Factor in the Way number and cache number into R11
|
||||
ORR r11, r11, r7, LSL r2 ; Factor in the Set number
|
||||
MCR p15, 0, r11, c7, c14, 2 ; Clean and Invalidate by Set/Way
|
||||
SUBS r9, r9, #1 ; Decrement the Way number
|
||||
BGE clean_way_loop
|
||||
SUBS r7, r7, #1 ; Decrement the Set number
|
||||
BGE clean_set_loop
|
||||
clinv_skip
|
||||
ADD r10, r10, #2 ; increment the cache number
|
||||
CMP r3, r10
|
||||
BGT clean_cache_level_loop
|
||||
clinv_finish
|
||||
NOP
|
||||
BX lr
|
||||
|
||||
|
||||
|
||||
// ===Data Cache maintenance by VA ===
|
||||
|
||||
|
||||
/**
|
||||
* \brief Invalidate data cache by VA to Poc
|
||||
*/
|
||||
SECTION .CP15_InvalidateDcacheByMva:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateDcacheByMva
|
||||
CP15_InvalidateDcacheByMva:
|
||||
mov r2, #0x20 ;Eight words per line, Cortex-A5 L1 Line Size 32 Bytes
|
||||
mov r3, r0
|
||||
inv_loop
|
||||
mcr p15, 0, r0, c7, c6, 1
|
||||
add r3, r3, r2
|
||||
cmp r3, r1
|
||||
bls inv_loop
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Clean data cache by MVA
|
||||
*/
|
||||
SECTION .CP15_CleanDCacheByMva:CODE:NOROOT(2)
|
||||
PUBLIC CP15_CleanDCacheByMva
|
||||
CP15_CleanDCacheByMva:
|
||||
mov r2, #0x20 ;Eight words per line, Cortex-A5 L1 Line Size 32 Bytes
|
||||
mov r3, r0
|
||||
clean_loop
|
||||
mcr p15, 0, r0, c7, c10, 1
|
||||
add r3, r3, r2
|
||||
cmp r3, r1
|
||||
bls clean_loop
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Clean unified cache by MVA
|
||||
*/
|
||||
SECTION .CP15_CleanDCacheUMva:CODE:NOROOT(2)
|
||||
PUBLIC CP15_CleanDCacheUMva
|
||||
CP15_CleanDCacheUMva:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c11, 1
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief Clean and invalidate data cache by VA to PoC
|
||||
*/
|
||||
SECTION .CP15_CleanInvalidateDcacheByMva:CODE:NOROOT(2)
|
||||
PUBLIC CP15_CleanInvalidateDcacheByMva
|
||||
CP15_CleanInvalidateDcacheByMva:
|
||||
mov r2, #0x20 ;Eight words per line, Cortex-A5 L1 Line Size 32 Bytes
|
||||
mov r3, r0
|
||||
clinv_loop
|
||||
mcr p15, 0, r0, c7, c14, 1
|
||||
add r3, r3, r2
|
||||
cmp r3, r1
|
||||
bls clinv_loop
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Invalidate translation table
|
||||
*/
|
||||
SECTION .CP15_InvalidateTranslationTable:CODE:NOROOT(2)
|
||||
PUBLIC CP15_InvalidateTranslationTable
|
||||
CP15_InvalidateTranslationTable:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c8, c3, 0
|
||||
dsb
|
||||
isb
|
||||
mcr p15, 0, r0, c8, c7, 0
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
/**
|
||||
* \brief flush translation table
|
||||
*/
|
||||
SECTION .CP15_FlushTranslationTable:CODE:NOROOT(2)
|
||||
PUBLIC CP15_FlushTranslationTable
|
||||
CP15_FlushTranslationTable:
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c8, c3, 0
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Ensure that the I and D caches are coherent within specified
|
||||
* region. This is typically used when code has been written to
|
||||
* a memory region, and will be executed.
|
||||
* \param start virtual start address of region
|
||||
* \param end virtual end address of region
|
||||
*/
|
||||
SECTION .CP15_coherent_dcache_for_dma:CODE:NOROOT(2)
|
||||
PUBLIC CP15_coherent_dcache_for_dma
|
||||
CP15_coherent_dcache_for_dma:
|
||||
// dcache_line_size r2, r3
|
||||
|
||||
mrc p15, 0, r3, c0, c0, 1 // read ctr
|
||||
lsr r3, r3, #16
|
||||
and r3, r3, #0xf // cache line size encoding
|
||||
mov r2, #4 // bytes per word
|
||||
mov r2, r2, lsl r3 // actual cache line size
|
||||
|
||||
sub r3, r2, #1
|
||||
bic r12, r0, r3
|
||||
loop1:
|
||||
mcr p15, 0, r12, c7, c11, 1 // clean D line to the point of unification
|
||||
add r12, r12, r2
|
||||
cmp r12, r1
|
||||
blo loop1
|
||||
dsb
|
||||
|
||||
// .macro icache_line_size, reg, tmp
|
||||
mrc p15, 0, r3, c0, c0, 1 // read ctr
|
||||
and r3, r3, #0xf // cache line size encoding
|
||||
mov r2, #4 // bytes per word
|
||||
mov r2, r2, lsl r3 // actual cache line size
|
||||
|
||||
sub r3, r2, #1
|
||||
bic r12, r0, r3
|
||||
loop2:
|
||||
mcr p15, 0, r12, c7, c5, 1 // invalidate I line
|
||||
add r12, r12, r2
|
||||
cmp r12, r1
|
||||
blo loop2
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c1, 6 //invalidate BTB Inner Shareable
|
||||
mcr p15, 0, r0, c7, c5, 6 // invalidate BTB
|
||||
dsb
|
||||
isb
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Invalidate the data cache within the specified region; we will
|
||||
* be performing a DMA operation in this region and we want to
|
||||
* purge old data in the cache.
|
||||
* \param start virtual start address of region
|
||||
* \param end virtual end address of region
|
||||
*/
|
||||
SECTION .CP15_invalidate_dcache_for_dma:CODE:NOROOT(2)
|
||||
PUBLIC CP15_invalidate_dcache_for_dma
|
||||
CP15_invalidate_dcache_for_dma:
|
||||
|
||||
// dcache_line_size r2, r3
|
||||
mrc p15, 0, r3, c0, c0, 1 // read ctr
|
||||
lsr r3, r3, #16
|
||||
and r3, r3, #0xf // cache line size encoding
|
||||
mov r2, #4 // bytes per word
|
||||
mov r2, r2, lsl r3 // actual cache line size
|
||||
|
||||
sub r3, r2, #1
|
||||
tst r0, r3
|
||||
bic r0, r0, r3
|
||||
|
||||
mcrne p15, 0, r0, c7, c14, 1 // clean & invalidate D / U line
|
||||
|
||||
tst r1, r3
|
||||
bic r1, r1, r3
|
||||
mcrne p15, 0, r1, c7, c14, 1 // clean & invalidate D / U line
|
||||
loop3:
|
||||
mcr p15, 0, r0, c7, c6, 1 // invalidate D / U line
|
||||
add r0, r0, r2
|
||||
cmp r0, r1
|
||||
blo loop3
|
||||
dsb
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Clean the data cache within the specified region
|
||||
* \param start virtual start address of region
|
||||
* \param end virtual end address of region
|
||||
*/
|
||||
SECTION .CP15_clean_dcache_for_dma:CODE:NOROOT(2)
|
||||
PUBLIC CP15_clean_dcache_for_dma
|
||||
CP15_clean_dcache_for_dma:
|
||||
// dcache_line_size r2, r3
|
||||
mrc p15, 0, r3, c0, c0, 1 // read ctr
|
||||
lsr r3, r3, #16
|
||||
and r3, r3, #0xf // cache line size encoding
|
||||
mov r2, #4 // bytes per word
|
||||
mov r2, r2, lsl r3 // actual cache line size
|
||||
|
||||
sub r3, r2, #1
|
||||
bic r0, r0, r3
|
||||
loop4:
|
||||
mcr p15, 0, r0, c7, c10, 1 // clean D / U line
|
||||
add r0, r0, r2
|
||||
cmp r0, r1
|
||||
blo loop4
|
||||
dsb
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief Flush the data cache within the specified region
|
||||
* \param start virtual start address of region
|
||||
* \param end virtual end address of region
|
||||
*/
|
||||
SECTION .CP15_flush_dcache_for_dma:CODE:NOROOT(2)
|
||||
PUBLIC CP15_flush_dcache_for_dma
|
||||
CP15_flush_dcache_for_dma:
|
||||
// dcache_line_size r2, r3
|
||||
mrc p15, 0, r3, c0, c0, 1 // read ctr
|
||||
lsr r3, r3, #16
|
||||
and r3, r3, #0xf // cache line size encoding
|
||||
mov r2, #4 // bytes per word
|
||||
mov r2, r2, lsl r3 // actual cache line size
|
||||
sub r3, r2, #1
|
||||
bic r0, r0, r3
|
||||
loop5:
|
||||
mcr p15, 0, r0, c7, c14, 1 // clean & invalidate D / U line
|
||||
add r0, r0, r2
|
||||
cmp r0, r1
|
||||
blo loop5
|
||||
dsb
|
||||
bx lr
|
||||
|
||||
|
||||
/**
|
||||
* \brief CP15_flush_kern_dcache_for_dma
|
||||
* Ensure that the data held in the page kaddr is written back to the page in question.
|
||||
* \param start virtual start address of region
|
||||
* \param end virtual end address of region
|
||||
*/
|
||||
SECTION .CP15_flush_kern_dcache_for_dma:CODE:NOROOT(2)
|
||||
PUBLIC CP15_flush_kern_dcache_for_dma
|
||||
CP15_flush_kern_dcache_for_dma:
|
||||
// dcache_line_size r2, r3
|
||||
mrc p15, 0, r3, c0, c0, 1 // read ctr
|
||||
lsr r3, r3, #16
|
||||
and r3, r3, #0xf // cache line size encoding
|
||||
mov r2, #4 // bytes per word
|
||||
mov r2, r2, lsl r3 // actual cache line size
|
||||
|
||||
add r1, r0, r1
|
||||
sub r3, r2, #1
|
||||
bic r0, r0, r3
|
||||
|
||||
mcr p15, 0, r0, c7, c14, 1 // clean & invalidate D line / unified line
|
||||
add r0, r0, r2
|
||||
cmp r0, r1
|
||||
blo 1b
|
||||
dsb
|
||||
bx lr
|
||||
END
|
||||
|
||||
82
A58-AMTLDR/Src/crc32.c
Normal file
82
A58-AMTLDR/Src/crc32.c
Normal file
@ -0,0 +1,82 @@
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
static const unsigned int crc32_table[] =
|
||||
{
|
||||
0x00000000, 0x04c11db7, 0x09823b6e, 0x0d4326d9,
|
||||
0x130476dc, 0x17c56b6b, 0x1a864db2, 0x1e475005,
|
||||
0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, 0x2b4bcb61,
|
||||
0x350c9b64, 0x31cd86d3, 0x3c8ea00a, 0x384fbdbd,
|
||||
0x4c11db70, 0x48d0c6c7, 0x4593e01e, 0x4152fda9,
|
||||
0x5f15adac, 0x5bd4b01b, 0x569796c2, 0x52568b75,
|
||||
0x6a1936c8, 0x6ed82b7f, 0x639b0da6, 0x675a1011,
|
||||
0x791d4014, 0x7ddc5da3, 0x709f7b7a, 0x745e66cd,
|
||||
0x9823b6e0, 0x9ce2ab57, 0x91a18d8e, 0x95609039,
|
||||
0x8b27c03c, 0x8fe6dd8b, 0x82a5fb52, 0x8664e6e5,
|
||||
0xbe2b5b58, 0xbaea46ef, 0xb7a96036, 0xb3687d81,
|
||||
0xad2f2d84, 0xa9ee3033, 0xa4ad16ea, 0xa06c0b5d,
|
||||
0xd4326d90, 0xd0f37027, 0xddb056fe, 0xd9714b49,
|
||||
0xc7361b4c, 0xc3f706fb, 0xceb42022, 0xca753d95,
|
||||
0xf23a8028, 0xf6fb9d9f, 0xfbb8bb46, 0xff79a6f1,
|
||||
0xe13ef6f4, 0xe5ffeb43, 0xe8bccd9a, 0xec7dd02d,
|
||||
0x34867077, 0x30476dc0, 0x3d044b19, 0x39c556ae,
|
||||
0x278206ab, 0x23431b1c, 0x2e003dc5, 0x2ac12072,
|
||||
0x128e9dcf, 0x164f8078, 0x1b0ca6a1, 0x1fcdbb16,
|
||||
0x018aeb13, 0x054bf6a4, 0x0808d07d, 0x0cc9cdca,
|
||||
0x7897ab07, 0x7c56b6b0, 0x71159069, 0x75d48dde,
|
||||
0x6b93dddb, 0x6f52c06c, 0x6211e6b5, 0x66d0fb02,
|
||||
0x5e9f46bf, 0x5a5e5b08, 0x571d7dd1, 0x53dc6066,
|
||||
0x4d9b3063, 0x495a2dd4, 0x44190b0d, 0x40d816ba,
|
||||
0xaca5c697, 0xa864db20, 0xa527fdf9, 0xa1e6e04e,
|
||||
0xbfa1b04b, 0xbb60adfc, 0xb6238b25, 0xb2e29692,
|
||||
0x8aad2b2f, 0x8e6c3698, 0x832f1041, 0x87ee0df6,
|
||||
0x99a95df3, 0x9d684044, 0x902b669d, 0x94ea7b2a,
|
||||
0xe0b41de7, 0xe4750050, 0xe9362689, 0xedf73b3e,
|
||||
0xf3b06b3b, 0xf771768c, 0xfa325055, 0xfef34de2,
|
||||
0xc6bcf05f, 0xc27dede8, 0xcf3ecb31, 0xcbffd686,
|
||||
0xd5b88683, 0xd1799b34, 0xdc3abded, 0xd8fba05a,
|
||||
0x690ce0ee, 0x6dcdfd59, 0x608edb80, 0x644fc637,
|
||||
0x7a089632, 0x7ec98b85, 0x738aad5c, 0x774bb0eb,
|
||||
0x4f040d56, 0x4bc510e1, 0x46863638, 0x42472b8f,
|
||||
0x5c007b8a, 0x58c1663d, 0x558240e4, 0x51435d53,
|
||||
0x251d3b9e, 0x21dc2629, 0x2c9f00f0, 0x285e1d47,
|
||||
0x36194d42, 0x32d850f5, 0x3f9b762c, 0x3b5a6b9b,
|
||||
0x0315d626, 0x07d4cb91, 0x0a97ed48, 0x0e56f0ff,
|
||||
0x1011a0fa, 0x14d0bd4d, 0x19939b94, 0x1d528623,
|
||||
0xf12f560e, 0xf5ee4bb9, 0xf8ad6d60, 0xfc6c70d7,
|
||||
0xe22b20d2, 0xe6ea3d65, 0xeba91bbc, 0xef68060b,
|
||||
0xd727bbb6, 0xd3e6a601, 0xdea580d8, 0xda649d6f,
|
||||
0xc423cd6a, 0xc0e2d0dd, 0xcda1f604, 0xc960ebb3,
|
||||
0xbd3e8d7e, 0xb9ff90c9, 0xb4bcb610, 0xb07daba7,
|
||||
0xae3afba2, 0xaafbe615, 0xa7b8c0cc, 0xa379dd7b,
|
||||
0x9b3660c6, 0x9ff77d71, 0x92b45ba8, 0x9675461f,
|
||||
0x8832161a, 0x8cf30bad, 0x81b02d74, 0x857130c3,
|
||||
0x5d8a9099, 0x594b8d2e, 0x5408abf7, 0x50c9b640,
|
||||
0x4e8ee645, 0x4a4ffbf2, 0x470cdd2b, 0x43cdc09c,
|
||||
0x7b827d21, 0x7f436096, 0x7200464f, 0x76c15bf8,
|
||||
0x68860bfd, 0x6c47164a, 0x61043093, 0x65c52d24,
|
||||
0x119b4be9, 0x155a565e, 0x18197087, 0x1cd86d30,
|
||||
0x029f3d35, 0x065e2082, 0x0b1d065b, 0x0fdc1bec,
|
||||
0x3793a651, 0x3352bbe6, 0x3e119d3f, 0x3ad08088,
|
||||
0x2497d08d, 0x2056cd3a, 0x2d15ebe3, 0x29d4f654,
|
||||
0xc5a92679, 0xc1683bce, 0xcc2b1d17, 0xc8ea00a0,
|
||||
0xd6ad50a5, 0xd26c4d12, 0xdf2f6bcb, 0xdbee767c,
|
||||
0xe3a1cbc1, 0xe760d676, 0xea23f0af, 0xeee2ed18,
|
||||
0xf0a5bd1d, 0xf464a0aa, 0xf9278673, 0xfde69bc4,
|
||||
0x89b8fd09, 0x8d79e0be, 0x803ac667, 0x84fbdbd0,
|
||||
0x9abc8bd5, 0x9e7d9662, 0x933eb0bb, 0x97ffad0c,
|
||||
0xafb010b1, 0xab710d06, 0xa6322bdf, 0xa2f33668,
|
||||
0xbcb4666d, 0xb8757bda, 0xb5365d03, 0xb1f740b4
|
||||
};
|
||||
|
||||
unsigned int
|
||||
xcrc32(const unsigned char *buf, int len, unsigned int init)
|
||||
{
|
||||
unsigned int crc = init;
|
||||
while (len--)
|
||||
{
|
||||
crc = (crc << 8) ^ crc32_table[((crc >> 24) ^ *buf) & 255];
|
||||
buf++;
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
7
A58-AMTLDR/Src/crc32.h
Normal file
7
A58-AMTLDR/Src/crc32.h
Normal file
@ -0,0 +1,7 @@
|
||||
#ifndef _CRC32_H
|
||||
#define _CRC32_H
|
||||
|
||||
unsigned int
|
||||
xcrc32(const unsigned char *buf, int len, unsigned int init);
|
||||
|
||||
#endif
|
||||
38
A58-AMTLDR/Src/exception.c
Normal file
38
A58-AMTLDR/Src/exception.c
Normal file
@ -0,0 +1,38 @@
|
||||
#include "UartPrint.h"
|
||||
|
||||
void undef_handler()
|
||||
{
|
||||
SendUartString("\r\nUndef EXC");
|
||||
while(1);
|
||||
}
|
||||
|
||||
void prefetch_handler()
|
||||
{
|
||||
SendUartString("\r\nPrefetch EXC");
|
||||
while(1);
|
||||
}
|
||||
|
||||
void data_abort_handler()
|
||||
{
|
||||
SendUartString("\r\nData abort EXC");
|
||||
while(1);
|
||||
}
|
||||
|
||||
void irq_handler()
|
||||
{
|
||||
SendUartString("\r\nIRQ EXC");
|
||||
while(1);
|
||||
}
|
||||
|
||||
void fiq_handler()
|
||||
{
|
||||
SendUartString("\r\nFIQ EXC");
|
||||
while(1);
|
||||
}
|
||||
|
||||
void swi_handler()
|
||||
{
|
||||
SendUartString("\r\nSWI EXC");
|
||||
while(1);
|
||||
}
|
||||
|
||||
243
A58-AMTLDR/Src/fs/diskio.c
Normal file
243
A58-AMTLDR/Src/fs/diskio.c
Normal file
@ -0,0 +1,243 @@
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* This is a stub disk I/O module that acts as front end of the existing */
|
||||
/* disk I/O modules and attach it to FatFs module with common interface. */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#include "diskio.h"
|
||||
|
||||
//#include <windows.h>
|
||||
|
||||
//#include "sdfmd.h"
|
||||
//#include <ethdbg.h>
|
||||
//#include <halether.h>
|
||||
|
||||
//extern DWORD SDInitialize(void);
|
||||
//extern DWORD WriteSector(PBYTE pData, DWORD dwStartSector, DWORD dwNumber);
|
||||
//extern DWORD ReadSector(PBYTE pData, DWORD dwStartSector, DWORD dwNumber);
|
||||
//extern void Delay(UINT32 count);
|
||||
|
||||
|
||||
|
||||
extern void lcd_printstr(char* str);
|
||||
#define printf lcd_printstr
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Correspondence between physical drive number and physical drive. */
|
||||
/* Note that Tiny-FatFs supports only single drive and always */
|
||||
/* accesses drive number 0. */
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Inidialize a Drive */
|
||||
DSTATUS disk_initialize (
|
||||
BYTE drv /* Physical drive nmuber (0..) */
|
||||
)
|
||||
{
|
||||
DSTATUS stat;
|
||||
int result;
|
||||
|
||||
switch (drv) {
|
||||
/*case ATA :
|
||||
result = ATA_disk_initialize();
|
||||
// translate the reslut code here
|
||||
|
||||
return stat;*/
|
||||
|
||||
case SDMMC :
|
||||
result = MMC_disk_initialize();
|
||||
// translate the reslut code here
|
||||
if(result < 0)
|
||||
stat = STA_NOINIT;
|
||||
else
|
||||
stat = 0;
|
||||
return stat;
|
||||
#if 0
|
||||
case USB :
|
||||
result = USB_disk_initialize();
|
||||
// translate the reslut code here
|
||||
if(result < 0)
|
||||
stat = STA_NOINIT;
|
||||
else
|
||||
stat = 0;
|
||||
|
||||
return stat;
|
||||
#endif
|
||||
}
|
||||
return STA_NOINIT;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Return Disk Status */
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE drv /* Physical drive nmuber (0..) */
|
||||
)
|
||||
{
|
||||
//drv = drv;
|
||||
return 0;
|
||||
#if 0
|
||||
|
||||
DSTATUS stat;
|
||||
int result;
|
||||
|
||||
|
||||
switch (drv) {
|
||||
case ATA :
|
||||
result = ATA_disk_status();
|
||||
// translate the reslut code here
|
||||
|
||||
return stat;
|
||||
|
||||
case SDMMC :
|
||||
result = MMC_disk_status();
|
||||
// translate the reslut code here
|
||||
|
||||
return stat;
|
||||
#if 0
|
||||
case USB :
|
||||
result = USB_disk_status();
|
||||
// translate the reslut code here
|
||||
|
||||
return stat;
|
||||
#endif
|
||||
}
|
||||
return STA_NOINIT;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
|
||||
DRESULT disk_read (
|
||||
BYTE drv, /* Physical drive nmuber (0..) */
|
||||
BYTE *buff, /* Data buffer to store read data */
|
||||
DWORD sector, /* Sector address (LBA) */
|
||||
BYTE count /* Number of sectors to read (1..255) */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
int result;
|
||||
|
||||
switch (drv) {
|
||||
/*case ATA :
|
||||
result = ATA_disk_read(buff, sector, count);
|
||||
// translate the reslut code here
|
||||
|
||||
return res;*/
|
||||
|
||||
case SDMMC :
|
||||
result = MMC_disk_read(buff, sector, count);
|
||||
// translate the reslut code here
|
||||
if(result < 0)
|
||||
res = RES_ERROR;
|
||||
else
|
||||
res = RES_OK;
|
||||
return res;
|
||||
#if 0
|
||||
case USB :
|
||||
result = USB_disk_read(buff, sector, count);
|
||||
// translate the reslut code here
|
||||
if(result < 0)
|
||||
res = RES_ERROR;
|
||||
else
|
||||
res = RES_OK;
|
||||
return res;
|
||||
#endif
|
||||
}
|
||||
|
||||
return RES_PARERR;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
|
||||
#if _READONLY == 0
|
||||
DRESULT disk_write (
|
||||
BYTE drv, /* Physical drive nmuber (0..) */
|
||||
const BYTE *buff, /* Data to be written */
|
||||
DWORD sector, /* Sector address (LBA) */
|
||||
BYTE count /* Number of sectors to write (1..255) */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
int result;
|
||||
|
||||
switch (drv) {
|
||||
case ATA :
|
||||
result = ATA_disk_write(buff, sector, count);
|
||||
// translate the reslut code here
|
||||
|
||||
return res;
|
||||
|
||||
case SDMMC :
|
||||
result = MMC_disk_write(buff, sector, count);
|
||||
// translate the reslut code here
|
||||
|
||||
return res;
|
||||
#if 0
|
||||
case USB :
|
||||
result = USB_disk_write(buff, sector, count);
|
||||
// translate the reslut code here
|
||||
|
||||
return res;
|
||||
#endif
|
||||
}
|
||||
return RES_PARERR;
|
||||
}
|
||||
#endif /* _READONLY */
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
|
||||
DRESULT disk_ioctl (
|
||||
BYTE drv, /* Physical drive nmuber (0..) */
|
||||
BYTE ctrl, /* Control code */
|
||||
void *buff /* Buffer to send/receive control data */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
int result;
|
||||
|
||||
switch (drv) {
|
||||
/*case ATA :
|
||||
// pre-process here
|
||||
|
||||
result = ATA_disk_ioctl(ctrl, buff);
|
||||
// post-process here
|
||||
|
||||
return res;*/
|
||||
|
||||
case SDMMC :
|
||||
// pre-process here
|
||||
|
||||
result = MMC_disk_ioctl(ctrl, buff);
|
||||
// post-process here
|
||||
if(result < 0)
|
||||
res = RES_PARERR;
|
||||
else
|
||||
res = RES_OK;
|
||||
return res;
|
||||
|
||||
/*case USB :
|
||||
// pre-process here
|
||||
|
||||
result = USB_disk_ioctl(ctrl, buff);
|
||||
if(result < 0)
|
||||
res = RES_PARERR;
|
||||
else
|
||||
res = RES_OK;
|
||||
|
||||
return res;*/
|
||||
}
|
||||
return RES_PARERR;
|
||||
}
|
||||
|
||||
86
A58-AMTLDR/Src/fs/diskio.h
Normal file
86
A58-AMTLDR/Src/fs/diskio.h
Normal file
@ -0,0 +1,86 @@
|
||||
/*-----------------------------------------------------------------------
|
||||
/ Low level disk interface modlue include file R0.06 (C)ChaN, 2007
|
||||
/-----------------------------------------------------------------------*/
|
||||
|
||||
#ifndef _DISKIO
|
||||
#define _DISKIO
|
||||
|
||||
#define _READONLY 1 /* 1: Read-only mode */
|
||||
#define _USE_IOCTL 1
|
||||
|
||||
#include "integer.h"
|
||||
|
||||
|
||||
/* Status of Disk Functions */
|
||||
typedef BYTE DSTATUS;
|
||||
|
||||
/* Results of Disk Functions */
|
||||
typedef enum {
|
||||
RES_OK = 0, /* 0: Successful */
|
||||
RES_ERROR, /* 1: R/W Error */
|
||||
RES_WRPRT, /* 2: Write Protected */
|
||||
RES_NOTRDY, /* 3: Not Ready */
|
||||
RES_PARERR /* 4: Invalid Parameter */
|
||||
} DRESULT;
|
||||
|
||||
|
||||
/*---------------------------------------*/
|
||||
/* Prototypes for disk control functions */
|
||||
|
||||
DSTATUS disk_initialize (BYTE);
|
||||
DSTATUS disk_status (BYTE);
|
||||
DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
|
||||
#if _READONLY == 0
|
||||
DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
|
||||
#endif
|
||||
DRESULT disk_ioctl (BYTE, BYTE, void*);
|
||||
void disk_timerproc (void);
|
||||
|
||||
|
||||
|
||||
|
||||
/* Disk Status Bits (DSTATUS) */
|
||||
|
||||
#define STA_NOINIT 0x01 /* Drive not initialized */
|
||||
#define STA_NODISK 0x02 /* No medium in the drive */
|
||||
#define STA_PROTECT 0x04 /* Write protected */
|
||||
|
||||
|
||||
/* Command code for disk_ioctrl() */
|
||||
|
||||
/* Generic command */
|
||||
#define CTRL_SYNC 0 /* Mandatory for read/write configuration */
|
||||
#define GET_SECTOR_COUNT 1 /* Mandatory for only f_mkfs() */
|
||||
#define GET_SECTOR_SIZE 2
|
||||
#define GET_BLOCK_SIZE 3 /* Mandatory for only f_mkfs() */
|
||||
#define CTRL_POWER 4
|
||||
#define CTRL_LOCK 5
|
||||
#define CTRL_EJECT 6
|
||||
/* MMC/SDC command */
|
||||
#define MMC_GET_TYPE 10
|
||||
#define MMC_GET_CSD 11
|
||||
#define MMC_GET_CID 12
|
||||
#define MMC_GET_OCR 13
|
||||
#define MMC_GET_SDSTAT 14
|
||||
/* ATA/CF command */
|
||||
#define ATA_GET_REV 20
|
||||
#define ATA_GET_MODEL 21
|
||||
#define ATA_GET_SN 22
|
||||
|
||||
#define SDMMC 0
|
||||
#define USB 1
|
||||
#define ATA 2
|
||||
|
||||
int MMC_disk_initialize(void);
|
||||
|
||||
int MMC_disk_read(void *buff, DWORD sector, BYTE count);
|
||||
|
||||
int MMC_disk_ioctl(BYTE ctrl, void *buff);
|
||||
|
||||
int USB_disk_initialize(void);
|
||||
|
||||
int USB_disk_read(void *buff, DWORD sector, BYTE count);
|
||||
|
||||
int USB_disk_ioctl(BYTE ctrl, void *buff);
|
||||
|
||||
#endif
|
||||
2057
A58-AMTLDR/Src/fs/ff.c
Normal file
2057
A58-AMTLDR/Src/fs/ff.c
Normal file
File diff suppressed because it is too large
Load Diff
343
A58-AMTLDR/Src/fs/ff.h
Normal file
343
A58-AMTLDR/Src/fs/ff.h
Normal file
@ -0,0 +1,343 @@
|
||||
/*--------------------------------------------------------------------------/
|
||||
/ FatFs - FAT file system module include file R0.06 (C)ChaN, 2008
|
||||
/---------------------------------------------------------------------------/
|
||||
/ FatFs module is an experimenal project to implement FAT file system to
|
||||
/ cheap microcontrollers. This is a free software and is opened for education,
|
||||
/ research and development under license policy of following trems.
|
||||
/
|
||||
/ Copyright (C) 2008, ChaN, all right reserved.
|
||||
/
|
||||
/ * The FatFs module is a free software and there is no warranty.
|
||||
/ * You can use, modify and/or redistribute it for personal, non-profit or
|
||||
/ commercial use without any restriction under your responsibility.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/---------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef _FATFS
|
||||
#define _FATFS
|
||||
|
||||
#define _MCU_ENDIAN 2
|
||||
/* The _MCU_ENDIAN defines which access method is used to the FAT structure.
|
||||
/ 1: Enable word access.
|
||||
/ 2: Disable word access and use byte-by-byte access instead.
|
||||
/ When the architectural byte order of the MCU is big-endian and/or address
|
||||
/ miss-aligned access results incorrect behavior, the _MCU_ENDIAN must be set to 2.
|
||||
/ If it is not the case, it can also be set to 1 for good code efficiency. */
|
||||
|
||||
#define _FS_READONLY 1
|
||||
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
|
||||
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
|
||||
/ f_truncate and useless f_getfree. */
|
||||
|
||||
#define _FS_MINIMIZE 3
|
||||
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
|
||||
/ 0: Full function.
|
||||
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename are removed.
|
||||
/ 2: f_opendir and f_readdir are removed in addition to level 1.
|
||||
/ 3: f_lseek is removed in addition to level 2. */
|
||||
|
||||
#define _USE_STRFUNC 0
|
||||
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
|
||||
|
||||
#define _USE_MKFS 0
|
||||
/* When _USE_MKFS is set to 1 and _FS_READONLY is set to 0, f_mkfs function is
|
||||
/ enabled. */
|
||||
|
||||
#define _DRIVES 2
|
||||
/* Number of logical drives to be used. This affects the size of internal table. */
|
||||
|
||||
#define _MULTI_PARTITION 0
|
||||
/* When _MULTI_PARTITION is set to 0, each logical drive is bound to same
|
||||
/ physical drive number and can mount only 1st primaly partition. When it is
|
||||
/ set to 1, each logical drive can mount a partition listed in Drives[]. */
|
||||
|
||||
#define _USE_FSINFO 1
|
||||
/* To enable FSInfo support on FAT32 volume, set _USE_FSINFO to 1. */
|
||||
|
||||
#define _USE_SJIS 1
|
||||
/* When _USE_SJIS is set to 1, Shift-JIS code transparency is enabled, otherwise
|
||||
/ only US-ASCII(7bit) code can be accepted as file/directory name. */
|
||||
|
||||
#define _USE_NTFLAG 1
|
||||
/* When _USE_NTFLAG is set to 1, upper/lower case of the file name is preserved.
|
||||
/ Note that the files are always accessed in case insensitive. */
|
||||
|
||||
|
||||
#include "integer.h"
|
||||
|
||||
|
||||
|
||||
/* Definitions corresponds to multiple sector size (not tested) */
|
||||
#define S_MAX_SIZ 512U /* Do not change */
|
||||
#if S_MAX_SIZ > 512U
|
||||
#define SS(fs) ((fs)->s_size)
|
||||
#else
|
||||
#define SS(fs) 512U
|
||||
#endif
|
||||
|
||||
|
||||
/* File system object structure */
|
||||
typedef struct _FATFS {
|
||||
WORD id; /* File system mount ID */
|
||||
WORD n_rootdir; /* Number of root directory entries */
|
||||
DWORD winsect; /* Current sector appearing in the win[] */
|
||||
DWORD sects_fat; /* Sectors per fat */
|
||||
DWORD max_clust; /* Maximum cluster# + 1 */
|
||||
DWORD fatbase; /* FAT start sector */
|
||||
DWORD dirbase; /* Root directory start sector (cluster# for FAT32) */
|
||||
DWORD database; /* Data start sector */
|
||||
#if !_FS_READONLY
|
||||
DWORD last_clust; /* Last allocated cluster */
|
||||
DWORD free_clust; /* Number of free clusters */
|
||||
#if _USE_FSINFO
|
||||
DWORD fsi_sector; /* fsinfo sector */
|
||||
BYTE fsi_flag; /* fsinfo dirty flag (1:must be written back) */
|
||||
BYTE pad2;
|
||||
#endif
|
||||
#else
|
||||
BYTE pad3;
|
||||
BYTE pad2;
|
||||
#endif
|
||||
BYTE fs_type; /* FAT sub type */
|
||||
BYTE csize; /* Number of sectors per cluster */
|
||||
#if S_MAX_SIZ > 512U
|
||||
WORD s_size; /* Sector size */
|
||||
#endif
|
||||
BYTE n_fats; /* Number of FAT copies */
|
||||
BYTE drive; /* Physical drive number */
|
||||
BYTE winflag; /* win[] dirty flag (1:must be written back) */
|
||||
BYTE pad1;
|
||||
BYTE win[S_MAX_SIZ]; /* Disk access window for Directory/FAT */
|
||||
} FATFS;
|
||||
|
||||
|
||||
/* Directory object structure */
|
||||
typedef struct _DIR {
|
||||
WORD id; /* Owner file system mount ID */
|
||||
WORD index; /* Current index */
|
||||
FATFS* fs; /* Pointer to the owner file system object */
|
||||
DWORD sclust; /* Start cluster */
|
||||
DWORD clust; /* Current cluster */
|
||||
DWORD sect; /* Current sector */
|
||||
} DIR;
|
||||
|
||||
|
||||
/* File object structure */
|
||||
typedef struct _FIL {
|
||||
WORD id; /* Owner file system mount ID */
|
||||
BYTE flag; /* File status flags */
|
||||
BYTE csect; /* Sector address in the cluster */
|
||||
FATFS* fs; /* Pointer to the owner file system object */
|
||||
DWORD fptr; /* File R/W pointer */
|
||||
DWORD fsize; /* File size */
|
||||
DWORD org_clust; /* File start cluster */
|
||||
DWORD curr_clust; /* Current cluster */
|
||||
DWORD curr_sect; /* Current sector */
|
||||
#if _FS_READONLY == 0
|
||||
DWORD dir_sect; /* Sector containing the directory entry */
|
||||
BYTE* dir_ptr; /* Ponter to the directory entry in the window */
|
||||
#endif
|
||||
BYTE buffer[S_MAX_SIZ]; /* File R/W buffer */
|
||||
} FIL;
|
||||
|
||||
|
||||
/* File status structure */
|
||||
typedef struct _FILINFO {
|
||||
DWORD fsize; /* Size */
|
||||
WORD fdate; /* Date */
|
||||
WORD ftime; /* Time */
|
||||
BYTE fattrib; /* Attribute */
|
||||
char fname[8+1+3+1]; /* Name (8.3 format) */
|
||||
} FILINFO;
|
||||
|
||||
|
||||
|
||||
/* Definitions corresponds to multi partition */
|
||||
|
||||
#if _MULTI_PARTITION != 0 /* Multiple partition cfg */
|
||||
|
||||
typedef struct _PARTITION {
|
||||
BYTE pd; /* Physical drive # (0-255) */
|
||||
BYTE pt; /* Partition # (0-3) */
|
||||
} PARTITION;
|
||||
extern
|
||||
const PARTITION Drives[]; /* Logical drive# to physical location conversion table */
|
||||
#define LD2PD(drv) (Drives[drv].pd) /* Get physical drive# */
|
||||
#define LD2PT(drv) (Drives[drv].pt) /* Get partition# */
|
||||
|
||||
#else /* Single partition cfg */
|
||||
|
||||
#define LD2PD(drv) (drv) /* Physical drive# is equal to logical drive# */
|
||||
#define LD2PT(drv) 0 /* Always mounts the 1st partition */
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* File function return code (FRESULT) */
|
||||
|
||||
typedef enum {
|
||||
FR_OK = 0, /* 0 */
|
||||
FR_NOT_READY, /* 1 */
|
||||
FR_NO_FILE, /* 2 */
|
||||
FR_NO_PATH, /* 3 */
|
||||
FR_INVALID_NAME, /* 4 */
|
||||
FR_INVALID_DRIVE, /* 5 */
|
||||
FR_DENIED, /* 6 */
|
||||
FR_EXIST, /* 7 */
|
||||
FR_RW_ERROR, /* 8 */
|
||||
FR_WRITE_PROTECTED, /* 9 */
|
||||
FR_NOT_ENABLED, /* 10 */
|
||||
FR_NO_FILESYSTEM, /* 11 */
|
||||
FR_INVALID_OBJECT, /* 12 */
|
||||
FR_MKFS_ABORTED /* 13 */
|
||||
} FRESULT;
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------*/
|
||||
/* FatFs module application interface */
|
||||
|
||||
FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */
|
||||
FRESULT f_open (FIL*, const char*, BYTE); /* Open or create a file */
|
||||
FRESULT f_read (FIL*, void*, UINT, UINT*); /* Read data from a file */
|
||||
FRESULT f_write (FIL*, const void*, UINT, UINT*); /* Write data to a file */
|
||||
FRESULT f_lseek (FIL*, DWORD); /* Move file pointer of a file object */
|
||||
FRESULT f_close (FIL*); /* Close an open file object */
|
||||
FRESULT f_opendir (DIR*, const char*); /* Open an existing directory */
|
||||
FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */
|
||||
FRESULT f_stat (const char*, FILINFO*); /* Get file status */
|
||||
FRESULT f_getfree (const char*, DWORD*, FATFS**); /* Get number of free clusters on the drive */
|
||||
FRESULT f_truncate (FIL*); /* Truncate file */
|
||||
FRESULT f_sync (FIL*); /* Flush cached data of a writing file */
|
||||
FRESULT f_unlink (const char*); /* Delete an existing file or directory */
|
||||
FRESULT f_mkdir (const char*); /* Create a new directory */
|
||||
FRESULT f_chmod (const char*, BYTE, BYTE); /* Change file/dir attriburte */
|
||||
FRESULT f_utime (const char*, const FILINFO*); /* Change file/dir timestamp */
|
||||
FRESULT f_rename (const char*, const char*); /* Rename/Move a file or directory */
|
||||
FRESULT f_mkfs (BYTE, BYTE, WORD); /* Create a file system on the drive */
|
||||
#if _USE_STRFUNC
|
||||
#define feof(fp) ((fp)->fptr == (fp)->fsize)
|
||||
#define EOF -1
|
||||
int fputc (int, FIL*); /* Put a character to the file */
|
||||
int fputs (const char*, FIL*); /* Put a string to the file */
|
||||
int fprintf (FIL*, const char*, ...); /* Put a formatted string to the file */
|
||||
char* fgets (char*, int, FIL*); /* Get a string from the file */
|
||||
#endif
|
||||
|
||||
/* User defined function to give a current time to fatfs module */
|
||||
|
||||
DWORD get_fattime (void); /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */
|
||||
/* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */
|
||||
|
||||
|
||||
|
||||
/* File access control and file status flags (FIL.flag) */
|
||||
|
||||
#define FA_READ 0x01
|
||||
#define FA_OPEN_EXISTING 0x00
|
||||
#if _FS_READONLY == 0
|
||||
#define FA_WRITE 0x02
|
||||
#define FA_CREATE_NEW 0x04
|
||||
#define FA_CREATE_ALWAYS 0x08
|
||||
#define FA_OPEN_ALWAYS 0x10
|
||||
#define FA__WRITTEN 0x20
|
||||
#define FA__DIRTY 0x40
|
||||
#endif
|
||||
#define FA__ERROR 0x80
|
||||
|
||||
|
||||
/* FAT sub type (FATFS.fs_type) */
|
||||
|
||||
#define FS_FAT12 1
|
||||
#define FS_FAT16 2
|
||||
#define FS_FAT32 3
|
||||
|
||||
|
||||
/* File attribute bits for directory entry */
|
||||
|
||||
#define AM_RDO 0x01 /* Read only */
|
||||
#define AM_HID 0x02 /* Hidden */
|
||||
#define AM_SYS 0x04 /* System */
|
||||
#define AM_VOL 0x08 /* Volume label */
|
||||
#define AM_LFN 0x0F /* LFN entry */
|
||||
#define AM_DIR 0x10 /* Directory */
|
||||
#define AM_ARC 0x20 /* Archive */
|
||||
|
||||
|
||||
|
||||
/* Offset of FAT structure members */
|
||||
|
||||
#define BS_jmpBoot 0
|
||||
#define BS_OEMName 3
|
||||
#define BPB_BytsPerSec 11
|
||||
#define BPB_SecPerClus 13
|
||||
#define BPB_RsvdSecCnt 14
|
||||
#define BPB_NumFATs 16
|
||||
#define BPB_RootEntCnt 17
|
||||
#define BPB_TotSec16 19
|
||||
#define BPB_Media 21
|
||||
#define BPB_FATSz16 22
|
||||
#define BPB_SecPerTrk 24
|
||||
#define BPB_NumHeads 26
|
||||
#define BPB_HiddSec 28
|
||||
#define BPB_TotSec32 32
|
||||
#define BS_55AA 510
|
||||
|
||||
#define BS_DrvNum 36
|
||||
#define BS_BootSig 38
|
||||
#define BS_VolID 39
|
||||
#define BS_VolLab 43
|
||||
#define BS_FilSysType 54
|
||||
|
||||
#define BPB_FATSz32 36
|
||||
#define BPB_ExtFlags 40
|
||||
#define BPB_FSVer 42
|
||||
#define BPB_RootClus 44
|
||||
#define BPB_FSInfo 48
|
||||
#define BPB_BkBootSec 50
|
||||
#define BS_DrvNum32 64
|
||||
#define BS_BootSig32 66
|
||||
#define BS_VolID32 67
|
||||
#define BS_VolLab32 71
|
||||
#define BS_FilSysType32 82
|
||||
|
||||
#define FSI_LeadSig 0
|
||||
#define FSI_StrucSig 484
|
||||
#define FSI_Free_Count 488
|
||||
#define FSI_Nxt_Free 492
|
||||
|
||||
#define MBR_Table 446
|
||||
|
||||
#define DIR_Name 0
|
||||
#define DIR_Attr 11
|
||||
#define DIR_NTres 12
|
||||
#define DIR_CrtTime 14
|
||||
#define DIR_CrtDate 16
|
||||
#define DIR_FstClusHI 20
|
||||
#define DIR_WrtTime 22
|
||||
#define DIR_WrtDate 24
|
||||
#define DIR_FstClusLO 26
|
||||
#define DIR_FileSize 28
|
||||
|
||||
|
||||
|
||||
/* Multi-byte word access macros */
|
||||
|
||||
#if _MCU_ENDIAN==1 /* Use word access */
|
||||
#define LD_WORD(ptr) (WORD)(*(WORD*)(BYTE*)(ptr))
|
||||
#define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr))
|
||||
#define ST_WORD(ptr,val) *(WORD*)(BYTE*)(ptr)=(WORD)(val)
|
||||
#define ST_DWORD(ptr,val) *(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
|
||||
#elif _MCU_ENDIAN==2 /* Use byte-by-byte access */
|
||||
#define LD_WORD(ptr) (WORD)(((WORD)*(volatile BYTE*)((ptr)+1)<<8)|(WORD)*(volatile BYTE*)(ptr))
|
||||
#define LD_DWORD(ptr) (DWORD)(((DWORD)*(volatile BYTE*)((ptr)+3)<<24)|((DWORD)*(volatile BYTE*)((ptr)+2)<<16)|((WORD)*(volatile BYTE*)((ptr)+1)<<8)|*(volatile BYTE*)(ptr))
|
||||
#define ST_WORD(ptr,val) *(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
|
||||
#define ST_DWORD(ptr,val) *(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(volatile BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(volatile BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
|
||||
#else
|
||||
#error Do not forget to set _MCU_ENDIAN properly!
|
||||
#endif
|
||||
|
||||
extern FATFS g_fs;
|
||||
|
||||
#endif /* _FATFS */
|
||||
33
A58-AMTLDR/Src/fs/integer.h
Normal file
33
A58-AMTLDR/Src/fs/integer.h
Normal file
@ -0,0 +1,33 @@
|
||||
/*-------------------------------------------*/
|
||||
/* Integer type definitions for FatFs module */
|
||||
/*-------------------------------------------*/
|
||||
|
||||
#ifndef _INTEGER
|
||||
|
||||
/* These types must be 16-bit, 32-bit or larger integer */
|
||||
typedef int INT;
|
||||
typedef unsigned int UINT;
|
||||
|
||||
/* These types must be 8-bit integer */
|
||||
typedef signed char CHAR;
|
||||
typedef unsigned char UCHAR;
|
||||
typedef unsigned char BYTE;
|
||||
|
||||
/* These types must be 16-bit integer */
|
||||
typedef short SHORT;
|
||||
typedef unsigned short USHORT;
|
||||
typedef unsigned short WORD;
|
||||
|
||||
/* These types must be 32-bit integer */
|
||||
typedef long LONG;
|
||||
typedef unsigned long ULONG;
|
||||
typedef unsigned long DWORD;
|
||||
|
||||
/* Boolean type */
|
||||
#undef FALSE
|
||||
#undef TRUE
|
||||
|
||||
typedef enum { FALSE = 0, TRUE } BOOL;
|
||||
|
||||
#define _INTEGER
|
||||
#endif
|
||||
10
A58-AMTLDR/Src/fs/sd_if.h
Normal file
10
A58-AMTLDR/Src/fs/sd_if.h
Normal file
@ -0,0 +1,10 @@
|
||||
#ifndef SD_IF_H__
|
||||
#define SD_IF_H__
|
||||
|
||||
int MMC_disk_initialize();
|
||||
|
||||
int MMC_disk_read(void *buff, DWORD sector, BYTE count);
|
||||
|
||||
int MMC_disk_ioctl(BYTE ctrl, void *buff);
|
||||
|
||||
#endif
|
||||
88
A58-AMTLDR/Src/gpio.c
Normal file
88
A58-AMTLDR/Src/gpio.c
Normal file
@ -0,0 +1,88 @@
|
||||
#include "amt630h.h"
|
||||
|
||||
#define GPIO_SWPORTA_DR 0x00
|
||||
#define GPIO_SWPORTA_DDR 0x04
|
||||
#define GPIO_SWPORTA_CTL 0x08
|
||||
#define GPIO_SWPORTA_INTEN 0x30
|
||||
#define GPIO_SWPORTA_INTMASK 0x34
|
||||
#define GPIO_SWPORTA_INTTYPE_LEVEL 0x38
|
||||
#define GPIO_SWPORTA_INT_POLARITY 0x3c
|
||||
#define GPIO_SWPORTA_INTSTATUS 0x40
|
||||
#define GPIO_SWPORTA_RAW_INTSTATUS 0x44
|
||||
#define GPIO_SWPORTA_DEBOUNCE 0x48
|
||||
#define GPIO_SWPORTA_EOI 0x4c
|
||||
#define GPIO_SWPORTA_EXT_PORTA 0x50
|
||||
#define GPIO_SWPORTA_EXT_PORTB 0x54
|
||||
#define GPIO_SWPORTA_EXT_PORTC 0x58
|
||||
#define GPIO_SWPORTA_EXT_PORTD 0x5c
|
||||
#define GPIO_SWPORTA_LS_SYNC 0x60
|
||||
#define GPIO_SWPORTA_ID_CODE 0x64
|
||||
#define GPIO_SWPORTA_INT_BOTHEDGE 0x68
|
||||
#define GPIO_SWPORTA_VER_ID_CODE 0x6C
|
||||
#define GPIO_SWPORTA_CONFIG_REG2 0x70
|
||||
#define GPIO_SWPORTA_CONFIG_REG1 0x74
|
||||
|
||||
#define GPIO_NUM 128
|
||||
|
||||
static unsigned int gpio_get_regbase(int gpio)
|
||||
{
|
||||
int gpiox = (gpio >> 5) & 0x3;
|
||||
|
||||
return GPIO_BASE + 0x80 * gpiox;
|
||||
}
|
||||
|
||||
static int GPIO_OFFSET(unsigned gpio)
|
||||
{
|
||||
if (gpio == 96)
|
||||
return 2;
|
||||
else if (gpio == 97)
|
||||
return 0;
|
||||
else if (gpio == 98)
|
||||
return 3;
|
||||
else if (gpio == 99)
|
||||
return 1;
|
||||
else
|
||||
return gpio & 0x1F;
|
||||
}
|
||||
|
||||
static void *GPIO_MODREG(unsigned gpio)
|
||||
{
|
||||
return (void*)(gpio_get_regbase(gpio) + GPIO_SWPORTA_DDR);
|
||||
}
|
||||
|
||||
static void *GPIO_WDATAREG(unsigned gpio)
|
||||
{
|
||||
return (void*)(gpio_get_regbase(gpio) + GPIO_SWPORTA_DR);
|
||||
}
|
||||
|
||||
static void *GPIO_RDATAREG(unsigned gpio)
|
||||
{
|
||||
return (void*)(gpio_get_regbase(gpio) + GPIO_SWPORTA_EXT_PORTA);
|
||||
}
|
||||
|
||||
void gpio_direction_output(unsigned gpio, int value)
|
||||
{
|
||||
writel(readl(GPIO_MODREG(gpio)) | (1 << GPIO_OFFSET(gpio)), GPIO_MODREG(gpio));
|
||||
if (value)
|
||||
writel(readl(GPIO_WDATAREG(gpio)) | (1 << GPIO_OFFSET(gpio)), GPIO_WDATAREG(gpio));
|
||||
else
|
||||
writel(readl(GPIO_WDATAREG(gpio)) & ~(1 << GPIO_OFFSET(gpio)), GPIO_WDATAREG(gpio));
|
||||
}
|
||||
|
||||
void gpio_direction_input(unsigned gpio)
|
||||
{
|
||||
writel(readl(GPIO_MODREG(gpio)) & ~(1 << GPIO_OFFSET(gpio)), GPIO_MODREG(gpio));
|
||||
}
|
||||
|
||||
void gpio_set_value(unsigned gpio, int value)
|
||||
{
|
||||
if (value)
|
||||
writel(readl(GPIO_WDATAREG(gpio)) | (1 << GPIO_OFFSET(gpio)), GPIO_WDATAREG(gpio));
|
||||
else
|
||||
writel(readl(GPIO_WDATAREG(gpio)) & ~(1 << GPIO_OFFSET(gpio)), GPIO_WDATAREG(gpio));
|
||||
}
|
||||
|
||||
int gpio_get_value(unsigned gpio)
|
||||
{
|
||||
return !!(readl(GPIO_RDATAREG(gpio)) & (1 << GPIO_OFFSET(gpio)));
|
||||
}
|
||||
23
A58-AMTLDR/Src/gpio.h
Normal file
23
A58-AMTLDR/Src/gpio.h
Normal file
@ -0,0 +1,23 @@
|
||||
#ifndef _GPIO_H
|
||||
#define _GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void gpio_request(unsigned gpio);
|
||||
|
||||
void gpio_direction_output(unsigned gpio, int value);
|
||||
|
||||
void gpio_direction_input(unsigned gpio);
|
||||
|
||||
void gpio_set_value(unsigned gpio, int value);
|
||||
|
||||
int gpio_get_value(unsigned gpio);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
685
A58-AMTLDR/Src/list.h
Normal file
685
A58-AMTLDR/Src/list.h
Normal file
@ -0,0 +1,685 @@
|
||||
#ifndef _LINUX_LIST_H
|
||||
#define _LINUX_LIST_H
|
||||
|
||||
#define LIST_POISON1 ((void *) 0x0)
|
||||
#define LIST_POISON2 ((void *) 0x0)
|
||||
|
||||
#ifndef ARCH_HAS_PREFETCH
|
||||
#define ARCH_HAS_PREFETCH
|
||||
static inline void prefetch(const void *x) {;}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Simple doubly linked list implementation.
|
||||
*
|
||||
* Some of the internal functions ("__xxx") are useful when
|
||||
* manipulating whole lists rather than single entries, as
|
||||
* sometimes we already know the next/prev entries and we can
|
||||
* generate better code by using them directly rather than
|
||||
* using the generic single-entry routines.
|
||||
*/
|
||||
|
||||
struct list_head {
|
||||
struct list_head *next, *prev;
|
||||
};
|
||||
|
||||
#define LIST_HEAD_INIT(name) { &(name), &(name) }
|
||||
|
||||
#define LIST_HEAD(name) \
|
||||
struct list_head name = LIST_HEAD_INIT(name)
|
||||
|
||||
static inline void INIT_LIST_HEAD(struct list_head *list)
|
||||
{
|
||||
list->next = list;
|
||||
list->prev = list;
|
||||
}
|
||||
|
||||
/*
|
||||
* Insert a new entry between two known consecutive entries.
|
||||
*
|
||||
* This is only for internal list manipulation where we know
|
||||
* the prev/next entries already!
|
||||
*/
|
||||
static inline void __list_add(struct list_head *new,
|
||||
struct list_head *prev,
|
||||
struct list_head *next)
|
||||
{
|
||||
next->prev = new;
|
||||
new->next = next;
|
||||
new->prev = prev;
|
||||
prev->next = new;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_add - add a new entry
|
||||
* @new: new entry to be added
|
||||
* @head: list head to add it after
|
||||
*
|
||||
* Insert a new entry after the specified head.
|
||||
* This is good for implementing stacks.
|
||||
*/
|
||||
static inline void list_add(struct list_head *new, struct list_head *head)
|
||||
{
|
||||
__list_add(new, head, head->next);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_add_tail - add a new entry
|
||||
* @new: new entry to be added
|
||||
* @head: list head to add it before
|
||||
*
|
||||
* Insert a new entry before the specified head.
|
||||
* This is useful for implementing queues.
|
||||
*/
|
||||
static inline void list_add_tail(struct list_head *new, struct list_head *head)
|
||||
{
|
||||
__list_add(new, head->prev, head);
|
||||
}
|
||||
|
||||
/*
|
||||
* Delete a list entry by making the prev/next entries
|
||||
* point to each other.
|
||||
*
|
||||
* This is only for internal list manipulation where we know
|
||||
* the prev/next entries already!
|
||||
*/
|
||||
static inline void __list_del(struct list_head *prev, struct list_head *next)
|
||||
{
|
||||
next->prev = prev;
|
||||
prev->next = next;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_del - deletes entry from list.
|
||||
* @entry: the element to delete from the list.
|
||||
* Note: list_empty() on entry does not return true after this, the entry is
|
||||
* in an undefined state.
|
||||
*/
|
||||
static inline void list_del(struct list_head *entry)
|
||||
{
|
||||
__list_del(entry->prev, entry->next);
|
||||
entry->next = LIST_POISON1;
|
||||
entry->prev = LIST_POISON2;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_replace - replace old entry by new one
|
||||
* @old : the element to be replaced
|
||||
* @new : the new element to insert
|
||||
*
|
||||
* If @old was empty, it will be overwritten.
|
||||
*/
|
||||
static inline void list_replace(struct list_head *old,
|
||||
struct list_head *new)
|
||||
{
|
||||
new->next = old->next;
|
||||
new->next->prev = new;
|
||||
new->prev = old->prev;
|
||||
new->prev->next = new;
|
||||
}
|
||||
|
||||
static inline void list_replace_init(struct list_head *old,
|
||||
struct list_head *new)
|
||||
{
|
||||
list_replace(old, new);
|
||||
INIT_LIST_HEAD(old);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_del_init - deletes entry from list and reinitialize it.
|
||||
* @entry: the element to delete from the list.
|
||||
*/
|
||||
static inline void list_del_init(struct list_head *entry)
|
||||
{
|
||||
__list_del(entry->prev, entry->next);
|
||||
INIT_LIST_HEAD(entry);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_move - delete from one list and add as another's head
|
||||
* @list: the entry to move
|
||||
* @head: the head that will precede our entry
|
||||
*/
|
||||
static inline void list_move(struct list_head *list, struct list_head *head)
|
||||
{
|
||||
__list_del(list->prev, list->next);
|
||||
list_add(list, head);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_move_tail - delete from one list and add as another's tail
|
||||
* @list: the entry to move
|
||||
* @head: the head that will follow our entry
|
||||
*/
|
||||
static inline void list_move_tail(struct list_head *list,
|
||||
struct list_head *head)
|
||||
{
|
||||
__list_del(list->prev, list->next);
|
||||
list_add_tail(list, head);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_is_last - tests whether @list is the last entry in list @head
|
||||
* @list: the entry to test
|
||||
* @head: the head of the list
|
||||
*/
|
||||
static inline int list_is_last(const struct list_head *list,
|
||||
const struct list_head *head)
|
||||
{
|
||||
return list->next == head;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_empty - tests whether a list is empty
|
||||
* @head: the list to test.
|
||||
*/
|
||||
static inline int list_empty(const struct list_head *head)
|
||||
{
|
||||
return head->next == head;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_empty_careful - tests whether a list is empty and not being modified
|
||||
* @head: the list to test
|
||||
*
|
||||
* Description:
|
||||
* tests whether a list is empty _and_ checks that no other CPU might be
|
||||
* in the process of modifying either member (next or prev)
|
||||
*
|
||||
* NOTE: using list_empty_careful() without synchronization
|
||||
* can only be safe if the only activity that can happen
|
||||
* to the list entry is list_del_init(). Eg. it cannot be used
|
||||
* if another CPU could re-list_add() it.
|
||||
*/
|
||||
static inline int list_empty_careful(const struct list_head *head)
|
||||
{
|
||||
struct list_head *next = head->next;
|
||||
return (next == head) && (next == head->prev);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_is_singular - tests whether a list has just one entry.
|
||||
* @head: the list to test.
|
||||
*/
|
||||
static inline int list_is_singular(const struct list_head *head)
|
||||
{
|
||||
return !list_empty(head) && (head->next == head->prev);
|
||||
}
|
||||
|
||||
static inline void __list_cut_position(struct list_head *list,
|
||||
struct list_head *head, struct list_head *entry)
|
||||
{
|
||||
struct list_head *new_first = entry->next;
|
||||
list->next = head->next;
|
||||
list->next->prev = list;
|
||||
list->prev = entry;
|
||||
entry->next = list;
|
||||
head->next = new_first;
|
||||
new_first->prev = head;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_cut_position - cut a list into two
|
||||
* @list: a new list to add all removed entries
|
||||
* @head: a list with entries
|
||||
* @entry: an entry within head, could be the head itself
|
||||
* and if so we won't cut the list
|
||||
*
|
||||
* This helper moves the initial part of @head, up to and
|
||||
* including @entry, from @head to @list. You should
|
||||
* pass on @entry an element you know is on @head. @list
|
||||
* should be an empty list or a list you do not care about
|
||||
* losing its data.
|
||||
*
|
||||
*/
|
||||
static inline void list_cut_position(struct list_head *list,
|
||||
struct list_head *head, struct list_head *entry)
|
||||
{
|
||||
if (list_empty(head))
|
||||
return;
|
||||
if (list_is_singular(head) &&
|
||||
(head->next != entry && head != entry))
|
||||
return;
|
||||
if (entry == head)
|
||||
INIT_LIST_HEAD(list);
|
||||
else
|
||||
__list_cut_position(list, head, entry);
|
||||
}
|
||||
|
||||
static inline void __list_splice(const struct list_head *list,
|
||||
struct list_head *prev,
|
||||
struct list_head *next)
|
||||
{
|
||||
struct list_head *first = list->next;
|
||||
struct list_head *last = list->prev;
|
||||
|
||||
first->prev = prev;
|
||||
prev->next = first;
|
||||
|
||||
last->next = next;
|
||||
next->prev = last;
|
||||
}
|
||||
|
||||
/**
|
||||
* list_splice - join two lists, this is designed for stacks
|
||||
* @list: the new list to add.
|
||||
* @head: the place to add it in the first list.
|
||||
*/
|
||||
static inline void list_splice(const struct list_head *list,
|
||||
struct list_head *head)
|
||||
{
|
||||
if (!list_empty(list))
|
||||
__list_splice(list, head, head->next);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_splice_tail - join two lists, each list being a queue
|
||||
* @list: the new list to add.
|
||||
* @head: the place to add it in the first list.
|
||||
*/
|
||||
static inline void list_splice_tail(struct list_head *list,
|
||||
struct list_head *head)
|
||||
{
|
||||
if (!list_empty(list))
|
||||
__list_splice(list, head->prev, head);
|
||||
}
|
||||
|
||||
/**
|
||||
* list_splice_init - join two lists and reinitialise the emptied list.
|
||||
* @list: the new list to add.
|
||||
* @head: the place to add it in the first list.
|
||||
*
|
||||
* The list at @list is reinitialised
|
||||
*/
|
||||
static inline void list_splice_init(struct list_head *list,
|
||||
struct list_head *head)
|
||||
{
|
||||
if (!list_empty(list)) {
|
||||
__list_splice(list, head, head->next);
|
||||
INIT_LIST_HEAD(list);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* list_splice_tail_init - join two lists and reinitialise the emptied list
|
||||
* @list: the new list to add.
|
||||
* @head: the place to add it in the first list.
|
||||
*
|
||||
* Each of the lists is a queue.
|
||||
* The list at @list is reinitialised
|
||||
*/
|
||||
static inline void list_splice_tail_init(struct list_head *list,
|
||||
struct list_head *head)
|
||||
{
|
||||
if (!list_empty(list)) {
|
||||
__list_splice(list, head->prev, head);
|
||||
INIT_LIST_HEAD(list);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* list_entry - get the struct for this entry
|
||||
* @ptr: the &struct list_head pointer.
|
||||
* @type: the type of the struct this is embedded in.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*/
|
||||
#define list_entry(ptr, type, member) \
|
||||
container_of(ptr, type, member)
|
||||
|
||||
/**
|
||||
* list_first_entry - get the first element from a list
|
||||
* @ptr: the list head to take the element from.
|
||||
* @type: the type of the struct this is embedded in.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Note, that list is expected to be not empty.
|
||||
*/
|
||||
#define list_first_entry(ptr, type, member) \
|
||||
list_entry((ptr)->next, type, member)
|
||||
|
||||
/**
|
||||
* list_last_entry - get the last element from a list
|
||||
* @ptr: the list head to take the element from.
|
||||
* @type: the type of the struct this is embedded in.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Note, that list is expected to be not empty.
|
||||
*/
|
||||
#define list_last_entry(ptr, type, member) \
|
||||
list_entry((ptr)->prev, type, member)
|
||||
|
||||
/**
|
||||
* list_for_each - iterate over a list
|
||||
* @pos: the &struct list_head to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
*/
|
||||
#define list_for_each(pos, head) \
|
||||
for (pos = (head)->next; prefetch(pos->next), pos != (head); \
|
||||
pos = pos->next)
|
||||
|
||||
/**
|
||||
* __list_for_each - iterate over a list
|
||||
* @pos: the &struct list_head to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
*
|
||||
* This variant differs from list_for_each() in that it's the
|
||||
* simplest possible list iteration code, no prefetching is done.
|
||||
* Use this for code that knows the list to be very short (empty
|
||||
* or 1 entry) most of the time.
|
||||
*/
|
||||
#define __list_for_each(pos, head) \
|
||||
for (pos = (head)->next; pos != (head); pos = pos->next)
|
||||
|
||||
/**
|
||||
* list_for_each_prev - iterate over a list backwards
|
||||
* @pos: the &struct list_head to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
*/
|
||||
#define list_for_each_prev(pos, head) \
|
||||
for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
|
||||
pos = pos->prev)
|
||||
|
||||
/**
|
||||
* list_for_each_safe - iterate over a list safe against removal of list entry
|
||||
* @pos: the &struct list_head to use as a loop cursor.
|
||||
* @n: another &struct list_head to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
*/
|
||||
#define list_for_each_safe(pos, n, head) \
|
||||
for (pos = (head)->next, n = pos->next; pos != (head); \
|
||||
pos = n, n = pos->next)
|
||||
|
||||
/**
|
||||
* list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry
|
||||
* @pos: the &struct list_head to use as a loop cursor.
|
||||
* @n: another &struct list_head to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
*/
|
||||
#define list_for_each_prev_safe(pos, n, head) \
|
||||
for (pos = (head)->prev, n = pos->prev; \
|
||||
prefetch(pos->prev), pos != (head); \
|
||||
pos = n, n = pos->prev)
|
||||
|
||||
/**
|
||||
* list_for_each_entry - iterate over list of given type
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*/
|
||||
#define list_for_each_entry(pos, head, member) \
|
||||
for (pos = list_entry((head)->next, typeof(*pos), member); \
|
||||
prefetch(pos->member.next), &pos->member != (head); \
|
||||
pos = list_entry(pos->member.next, typeof(*pos), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_reverse - iterate backwards over list of given type.
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*/
|
||||
#define list_for_each_entry_reverse(pos, head, member) \
|
||||
for (pos = list_entry((head)->prev, typeof(*pos), member); \
|
||||
prefetch(pos->member.prev), &pos->member != (head); \
|
||||
pos = list_entry(pos->member.prev, typeof(*pos), member))
|
||||
|
||||
/**
|
||||
* list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue()
|
||||
* @pos: the type * to use as a start point
|
||||
* @head: the head of the list
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Prepares a pos entry for use as a start point in list_for_each_entry_continue().
|
||||
*/
|
||||
#define list_prepare_entry(pos, head, member) \
|
||||
((pos) ? : list_entry(head, typeof(*pos), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_continue - continue iteration over list of given type
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Continue to iterate over list of given type, continuing after
|
||||
* the current position.
|
||||
*/
|
||||
#define list_for_each_entry_continue(pos, head, member) \
|
||||
for (pos = list_entry(pos->member.next, typeof(*pos), member); \
|
||||
prefetch(pos->member.next), &pos->member != (head); \
|
||||
pos = list_entry(pos->member.next, typeof(*pos), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_continue_reverse - iterate backwards from the given point
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Start to iterate over list of given type backwards, continuing after
|
||||
* the current position.
|
||||
*/
|
||||
#define list_for_each_entry_continue_reverse(pos, head, member) \
|
||||
for (pos = list_entry(pos->member.prev, typeof(*pos), member); \
|
||||
prefetch(pos->member.prev), &pos->member != (head); \
|
||||
pos = list_entry(pos->member.prev, typeof(*pos), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_from - iterate over list of given type from the current point
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Iterate over list of given type, continuing from current position.
|
||||
*/
|
||||
#define list_for_each_entry_from(pos, head, member) \
|
||||
for (; prefetch(pos->member.next), &pos->member != (head); \
|
||||
pos = list_entry(pos->member.next, typeof(*pos), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_safe - iterate over list of given type safe against removal of list entry
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @n: another type * to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*/
|
||||
#define list_for_each_entry_safe(pos, n, head, member) \
|
||||
for (pos = list_entry((head)->next, typeof(*pos), member), \
|
||||
n = list_entry(pos->member.next, typeof(*pos), member); \
|
||||
&pos->member != (head); \
|
||||
pos = n, n = list_entry(n->member.next, typeof(*n), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_safe_continue
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @n: another type * to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Iterate over list of given type, continuing after current point,
|
||||
* safe against removal of list entry.
|
||||
*/
|
||||
#define list_for_each_entry_safe_continue(pos, n, head, member) \
|
||||
for (pos = list_entry(pos->member.next, typeof(*pos), member), \
|
||||
n = list_entry(pos->member.next, typeof(*pos), member); \
|
||||
&pos->member != (head); \
|
||||
pos = n, n = list_entry(n->member.next, typeof(*n), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_safe_from
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @n: another type * to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Iterate over list of given type from current point, safe against
|
||||
* removal of list entry.
|
||||
*/
|
||||
#define list_for_each_entry_safe_from(pos, n, head, member) \
|
||||
for (n = list_entry(pos->member.next, typeof(*pos), member); \
|
||||
&pos->member != (head); \
|
||||
pos = n, n = list_entry(n->member.next, typeof(*n), member))
|
||||
|
||||
/**
|
||||
* list_for_each_entry_safe_reverse
|
||||
* @pos: the type * to use as a loop cursor.
|
||||
* @n: another type * to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the list_struct within the struct.
|
||||
*
|
||||
* Iterate backwards over list of given type, safe against removal
|
||||
* of list entry.
|
||||
*/
|
||||
#define list_for_each_entry_safe_reverse(pos, n, head, member) \
|
||||
for (pos = list_entry((head)->prev, typeof(*pos), member), \
|
||||
n = list_entry(pos->member.prev, typeof(*pos), member); \
|
||||
&pos->member != (head); \
|
||||
pos = n, n = list_entry(n->member.prev, typeof(*n), member))
|
||||
|
||||
/*
|
||||
* Double linked lists with a single pointer list head.
|
||||
* Mostly useful for hash tables where the two pointer list head is
|
||||
* too wasteful.
|
||||
* You lose the ability to access the tail in O(1).
|
||||
*/
|
||||
|
||||
struct hlist_head {
|
||||
struct hlist_node *first;
|
||||
};
|
||||
|
||||
struct hlist_node {
|
||||
struct hlist_node *next, **pprev;
|
||||
};
|
||||
|
||||
#define HLIST_HEAD_INIT { .first = NULL }
|
||||
#define HLIST_HEAD(name) struct hlist_head name = { .first = NULL }
|
||||
#define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL)
|
||||
static inline void INIT_HLIST_NODE(struct hlist_node *h)
|
||||
{
|
||||
h->next = NULL;
|
||||
h->pprev = NULL;
|
||||
}
|
||||
|
||||
static inline int hlist_unhashed(const struct hlist_node *h)
|
||||
{
|
||||
return !h->pprev;
|
||||
}
|
||||
|
||||
static inline int hlist_empty(const struct hlist_head *h)
|
||||
{
|
||||
return !h->first;
|
||||
}
|
||||
|
||||
static inline void __hlist_del(struct hlist_node *n)
|
||||
{
|
||||
struct hlist_node *next = n->next;
|
||||
struct hlist_node **pprev = n->pprev;
|
||||
*pprev = next;
|
||||
if (next)
|
||||
next->pprev = pprev;
|
||||
}
|
||||
|
||||
static inline void hlist_del(struct hlist_node *n)
|
||||
{
|
||||
__hlist_del(n);
|
||||
n->next = LIST_POISON1;
|
||||
n->pprev = LIST_POISON2;
|
||||
}
|
||||
|
||||
static inline void hlist_del_init(struct hlist_node *n)
|
||||
{
|
||||
if (!hlist_unhashed(n)) {
|
||||
__hlist_del(n);
|
||||
INIT_HLIST_NODE(n);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
|
||||
{
|
||||
struct hlist_node *first = h->first;
|
||||
n->next = first;
|
||||
if (first)
|
||||
first->pprev = &n->next;
|
||||
h->first = n;
|
||||
n->pprev = &h->first;
|
||||
}
|
||||
|
||||
/* next must be != NULL */
|
||||
static inline void hlist_add_before(struct hlist_node *n,
|
||||
struct hlist_node *next)
|
||||
{
|
||||
n->pprev = next->pprev;
|
||||
n->next = next;
|
||||
next->pprev = &n->next;
|
||||
*(n->pprev) = n;
|
||||
}
|
||||
|
||||
static inline void hlist_add_after(struct hlist_node *n,
|
||||
struct hlist_node *next)
|
||||
{
|
||||
next->next = n->next;
|
||||
n->next = next;
|
||||
next->pprev = &n->next;
|
||||
|
||||
if(next->next)
|
||||
next->next->pprev = &next->next;
|
||||
}
|
||||
|
||||
#define hlist_entry(ptr, type, member) container_of(ptr,type,member)
|
||||
|
||||
#define hlist_for_each(pos, head) \
|
||||
for (pos = (head)->first; pos && ({ prefetch(pos->next); 1; }); \
|
||||
pos = pos->next)
|
||||
|
||||
#define hlist_for_each_safe(pos, n, head) \
|
||||
for (pos = (head)->first; pos && ({ n = pos->next; 1; }); \
|
||||
pos = n)
|
||||
|
||||
/**
|
||||
* hlist_for_each_entry - iterate over list of given type
|
||||
* @tpos: the type * to use as a loop cursor.
|
||||
* @pos: the &struct hlist_node to use as a loop cursor.
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the hlist_node within the struct.
|
||||
*/
|
||||
#define hlist_for_each_entry(tpos, pos, head, member) \
|
||||
for (pos = (head)->first; \
|
||||
pos && ({ prefetch(pos->next); 1;}) && \
|
||||
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
|
||||
pos = pos->next)
|
||||
|
||||
/**
|
||||
* hlist_for_each_entry_continue - iterate over a hlist continuing after current point
|
||||
* @tpos: the type * to use as a loop cursor.
|
||||
* @pos: the &struct hlist_node to use as a loop cursor.
|
||||
* @member: the name of the hlist_node within the struct.
|
||||
*/
|
||||
#define hlist_for_each_entry_continue(tpos, pos, member) \
|
||||
for (pos = (pos)->next; \
|
||||
pos && ({ prefetch(pos->next); 1;}) && \
|
||||
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
|
||||
pos = pos->next)
|
||||
|
||||
/**
|
||||
* hlist_for_each_entry_from - iterate over a hlist continuing from current point
|
||||
* @tpos: the type * to use as a loop cursor.
|
||||
* @pos: the &struct hlist_node to use as a loop cursor.
|
||||
* @member: the name of the hlist_node within the struct.
|
||||
*/
|
||||
#define hlist_for_each_entry_from(tpos, pos, member) \
|
||||
for (; pos && ({ prefetch(pos->next); 1;}) && \
|
||||
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
|
||||
pos = pos->next)
|
||||
|
||||
/**
|
||||
* hlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry
|
||||
* @tpos: the type * to use as a loop cursor.
|
||||
* @pos: the &struct hlist_node to use as a loop cursor.
|
||||
* @n: another &struct hlist_node to use as temporary storage
|
||||
* @head: the head for your list.
|
||||
* @member: the name of the hlist_node within the struct.
|
||||
*/
|
||||
#define hlist_for_each_entry_safe(tpos, pos, n, head, member) \
|
||||
for (pos = (head)->first; \
|
||||
pos && ({ n = pos->next; 1; }) && \
|
||||
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
|
||||
pos = n)
|
||||
|
||||
#endif
|
||||
98
A58-AMTLDR/Src/mmu.c
Normal file
98
A58-AMTLDR/Src/mmu.c
Normal file
@ -0,0 +1,98 @@
|
||||
#include "mmu.h"
|
||||
|
||||
//#pragma data_alignment=16384
|
||||
//__no_init unsigned int mmu_tlb_table[4096];
|
||||
|
||||
//#define _MMUTT_STARTADDRESS ((unsigned int)mmu_tlb_table)
|
||||
#define _MMUTT_STARTADDRESS ((unsigned int)0x30c000)
|
||||
|
||||
|
||||
/**
|
||||
* \brief Initializes MMU.
|
||||
* \param pTB Address of the translation table.
|
||||
*/
|
||||
void MMU_Initialize(unsigned int *pTB)
|
||||
{
|
||||
unsigned int index;
|
||||
unsigned int addr;
|
||||
|
||||
/* Reset table entries */
|
||||
for (index = 0; index < 4096; index++)
|
||||
pTB[index] = 0;
|
||||
|
||||
/* interrupt vector address (after remap) 0x0000_0000 */
|
||||
pTB[0x000] = (0x200 << 20)| // Physical Address
|
||||
// ( 1 << 12)| // TEX[0]
|
||||
( 3 << 10)| // Access in supervisor mode (AP)
|
||||
( 0xF << 5)| // Domain 0xF
|
||||
( 1 << 4)| // (XN)
|
||||
( 0 << 3)| // C bit : cachable => YES
|
||||
( 0 << 2)| // B bit : write-back => YES
|
||||
( 2 << 0); // Set as 1 Mbyte section
|
||||
|
||||
/* SRAM address (after remap) 0x0030_0000 */
|
||||
pTB[0x003] = (0x003 << 20)| // Physical Address
|
||||
( 1 << 18)| // 16MB Supersection
|
||||
( 3 << 10)| // Access in supervisor mode (AP)
|
||||
( 1 << 12)| // TEX[0]
|
||||
( 0 << 5)| // Domain 0x0, Supersection only support domain 0
|
||||
( 0 << 4)| // (XN)
|
||||
( 1 << 3)| // C bit : cachable => YES
|
||||
( 1 << 2)| // B bit : write-back => YES
|
||||
( 2 << 0); // Set as 1 Mbyte section
|
||||
|
||||
/* DDRAM address (after remap) 0x2000_0000 */
|
||||
for(addr = 0x200; addr < 0x220; addr++)
|
||||
pTB[addr] = (addr << 20)| // Physical Address
|
||||
( 1 << 18)| // 16MB Supersection
|
||||
( 3 << 10)| // Access in supervisor mode (AP)
|
||||
( 1 << 12)| // TEX[0]
|
||||
( 0 << 5)| // Domain 0x0, Supersection only support domain 0
|
||||
( 0 << 4)| // (XN)
|
||||
( 1 << 3)| // C bit : cachable => YES
|
||||
( 1 << 2)| // B bit : write-back => YES
|
||||
( 2 << 0); // Set as 1 Mbyte section
|
||||
|
||||
/* DDRAM non-cache address (after remap) 0x3000_0000 */
|
||||
for(addr = 0x300; addr < 0x320; addr++)
|
||||
pTB[addr] = ((addr - 0x100) << 20)| // Physical Address
|
||||
( 1 << 18)| // 16MB Supersection
|
||||
( 3 << 10)| // Access in supervisor mode (AP)
|
||||
( 1 << 12)| // TEX[0]
|
||||
( 0 << 5)| // Domain 0x0, Supersection only support domain 0
|
||||
( 0 << 4)| // (XN)
|
||||
( 0 << 3)| // C bit : cachable => YES
|
||||
( 0 << 2)| // B bit : write-back => YES
|
||||
( 2 << 0); // Set as 1 Mbyte section
|
||||
|
||||
// periph address 0x60000000 ~ 0x80000000
|
||||
for(addr = 0x600; addr < 0x800; addr++)
|
||||
pTB[addr] = (addr << 20)| // Physical Address
|
||||
( 3 << 10)| // Access in supervisor mode (AP)
|
||||
( 0xF << 5)| // Domain 0xF
|
||||
( 1 << 4)| // (XN)
|
||||
( 0 << 3)| // C bit : cachable => NO
|
||||
( 0 << 2)| // B bit : write-back => NO
|
||||
( 2 << 0); // Set as 1 Mbyte section
|
||||
|
||||
CP15_WriteTTB((unsigned int)pTB);
|
||||
/* Program the domain access register */
|
||||
CP15_WriteDomainAccessControl(0xC0000003); // only domain 0 & 15: access are not checked
|
||||
}
|
||||
|
||||
void MMU_Init(void)
|
||||
{
|
||||
if(CP15_IsIcacheEnabled())
|
||||
CP15_DisableIcache();
|
||||
if(CP15_IsDcacheEnabled())
|
||||
CP15_DisableDcache();
|
||||
|
||||
if(CP15_IsMMUEnabled())
|
||||
CP15_DisableMMU();
|
||||
|
||||
MMU_Initialize((unsigned int*)_MMUTT_STARTADDRESS);
|
||||
|
||||
CP15_EnableMMU();
|
||||
CP15_EnableIcache();
|
||||
CP15_EnableDcache();
|
||||
}
|
||||
21
A58-AMTLDR/Src/mmu.h
Normal file
21
A58-AMTLDR/Src/mmu.h
Normal file
@ -0,0 +1,21 @@
|
||||
#ifndef _MMU_
|
||||
#define _MMU_
|
||||
#include "cp15.h"
|
||||
/*----------------------------------------------------------------------------
|
||||
* Headers
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Exported functions
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern void MMU_Init(void);
|
||||
extern void dma_flush_range(unsigned int ulStart, unsigned int ulEnd);
|
||||
extern void dma_inv_range (unsigned int ulStart, unsigned int ulEnd);
|
||||
extern void dma_clean_range(unsigned int ulStart, unsigned int ulEnd);
|
||||
extern unsigned int vaddr_to_page_addr (unsigned int addr);
|
||||
extern unsigned int page_addr_to_vaddr (unsigned int addr);
|
||||
|
||||
|
||||
|
||||
#endif /* #ifndef _MMU_ */
|
||||
|
||||
244
A58-AMTLDR/Src/scsi.h
Normal file
244
A58-AMTLDR/Src/scsi.h
Normal file
@ -0,0 +1,244 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* (C) Copyright 2001
|
||||
* Denis Peter, MPL AG Switzerland
|
||||
*/
|
||||
#ifndef _SCSI_H
|
||||
#define _SCSI_H
|
||||
|
||||
struct scsi_cmd {
|
||||
unsigned char cmd[16]; /* command */
|
||||
/* for request sense */
|
||||
#pragma pack(ARCH_DMA_MINALIGN)
|
||||
unsigned char sense_buf[64];
|
||||
unsigned char status; /* SCSI Status */
|
||||
unsigned char target; /* Target ID */
|
||||
unsigned char lun; /* Target LUN */
|
||||
unsigned char cmdlen; /* command len */
|
||||
unsigned long datalen; /* Total data length */
|
||||
unsigned char * pdata; /* pointer to data */
|
||||
unsigned char msgout[12]; /* Messge out buffer (NOT USED) */
|
||||
unsigned char msgin[12]; /* Message in buffer */
|
||||
unsigned char sensecmdlen; /* Sense command len */
|
||||
unsigned long sensedatalen; /* Sense data len */
|
||||
unsigned char sensecmd[6]; /* Sense command */
|
||||
unsigned long contr_stat; /* Controller Status */
|
||||
unsigned long trans_bytes; /* tranfered bytes */
|
||||
|
||||
unsigned int priv;
|
||||
};
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
**
|
||||
** SCSI constants.
|
||||
**
|
||||
**-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
** Messages
|
||||
*/
|
||||
|
||||
#define M_COMPLETE (0x00)
|
||||
#define M_EXTENDED (0x01)
|
||||
#define M_SAVE_DP (0x02)
|
||||
#define M_RESTORE_DP (0x03)
|
||||
#define M_DISCONNECT (0x04)
|
||||
#define M_ID_ERROR (0x05)
|
||||
#define M_ABORT (0x06)
|
||||
#define M_REJECT (0x07)
|
||||
#define M_NOOP (0x08)
|
||||
#define M_PARITY (0x09)
|
||||
#define M_LCOMPLETE (0x0a)
|
||||
#define M_FCOMPLETE (0x0b)
|
||||
#define M_RESET (0x0c)
|
||||
#define M_ABORT_TAG (0x0d)
|
||||
#define M_CLEAR_QUEUE (0x0e)
|
||||
#define M_INIT_REC (0x0f)
|
||||
#define M_REL_REC (0x10)
|
||||
#define M_TERMINATE (0x11)
|
||||
#define M_SIMPLE_TAG (0x20)
|
||||
#define M_HEAD_TAG (0x21)
|
||||
#define M_ORDERED_TAG (0x22)
|
||||
#define M_IGN_RESIDUE (0x23)
|
||||
#define M_IDENTIFY (0x80)
|
||||
|
||||
#define M_X_MODIFY_DP (0x00)
|
||||
#define M_X_SYNC_REQ (0x01)
|
||||
#define M_X_WIDE_REQ (0x03)
|
||||
#define M_X_PPR_REQ (0x04)
|
||||
|
||||
|
||||
/*
|
||||
** Status
|
||||
*/
|
||||
|
||||
#define S_GOOD (0x00)
|
||||
#define S_CHECK_COND (0x02)
|
||||
#define S_COND_MET (0x04)
|
||||
#define S_BUSY (0x08)
|
||||
#define S_INT (0x10)
|
||||
#define S_INT_COND_MET (0x14)
|
||||
#define S_CONFLICT (0x18)
|
||||
#define S_TERMINATED (0x20)
|
||||
#define S_QUEUE_FULL (0x28)
|
||||
#define S_ILLEGAL (0xff)
|
||||
#define S_SENSE (0x80)
|
||||
|
||||
/*
|
||||
* Sense_keys
|
||||
*/
|
||||
|
||||
#define SENSE_NO_SENSE 0x0
|
||||
#define SENSE_RECOVERED_ERROR 0x1
|
||||
#define SENSE_NOT_READY 0x2
|
||||
#define SENSE_MEDIUM_ERROR 0x3
|
||||
#define SENSE_HARDWARE_ERROR 0x4
|
||||
#define SENSE_ILLEGAL_REQUEST 0x5
|
||||
#define SENSE_UNIT_ATTENTION 0x6
|
||||
#define SENSE_DATA_PROTECT 0x7
|
||||
#define SENSE_BLANK_CHECK 0x8
|
||||
#define SENSE_VENDOR_SPECIFIC 0x9
|
||||
#define SENSE_COPY_ABORTED 0xA
|
||||
#define SENSE_ABORTED_COMMAND 0xB
|
||||
#define SENSE_VOLUME_OVERFLOW 0xD
|
||||
#define SENSE_MISCOMPARE 0xE
|
||||
|
||||
|
||||
#define SCSI_CHANGE_DEF 0x40 /* Change Definition (Optional) */
|
||||
#define SCSI_COMPARE 0x39 /* Compare (O) */
|
||||
#define SCSI_COPY 0x18 /* Copy (O) */
|
||||
#define SCSI_COP_VERIFY 0x3A /* Copy and Verify (O) */
|
||||
#define SCSI_INQUIRY 0x12 /* Inquiry (MANDATORY) */
|
||||
#define SCSI_LOG_SELECT 0x4C /* Log Select (O) */
|
||||
#define SCSI_LOG_SENSE 0x4D /* Log Sense (O) */
|
||||
#define SCSI_MODE_SEL6 0x15 /* Mode Select 6-byte (Device Specific) */
|
||||
#define SCSI_MODE_SEL10 0x55 /* Mode Select 10-byte (Device Specific) */
|
||||
#define SCSI_MODE_SEN6 0x1A /* Mode Sense 6-byte (Device Specific) */
|
||||
#define SCSI_MODE_SEN10 0x5A /* Mode Sense 10-byte (Device Specific) */
|
||||
#define SCSI_READ_BUFF 0x3C /* Read Buffer (O) */
|
||||
#define SCSI_REQ_SENSE 0x03 /* Request Sense (MANDATORY) */
|
||||
#define SCSI_SEND_DIAG 0x1D /* Send Diagnostic (O) */
|
||||
#define SCSI_TST_U_RDY 0x00 /* Test Unit Ready (MANDATORY) */
|
||||
#define SCSI_WRITE_BUFF 0x3B /* Write Buffer (O) */
|
||||
/***************************************************************************
|
||||
* %%% Commands Unique to Direct Access Devices %%%
|
||||
***************************************************************************/
|
||||
#define SCSI_COMPARE 0x39 /* Compare (O) */
|
||||
#define SCSI_FORMAT 0x04 /* Format Unit (MANDATORY) */
|
||||
#define SCSI_LCK_UN_CAC 0x36 /* Lock Unlock Cache (O) */
|
||||
#define SCSI_PREFETCH 0x34 /* Prefetch (O) */
|
||||
#define SCSI_MED_REMOVL 0x1E /* Prevent/Allow medium Removal (O) */
|
||||
#define SCSI_READ6 0x08 /* Read 6-byte (MANDATORY) */
|
||||
#define SCSI_READ10 0x28 /* Read 10-byte (MANDATORY) */
|
||||
#define SCSI_READ16 0x48
|
||||
#define SCSI_RD_CAPAC 0x25 /* Read Capacity (MANDATORY) */
|
||||
#define SCSI_RD_CAPAC10 SCSI_RD_CAPAC /* Read Capacity (10) */
|
||||
#define SCSI_RD_CAPAC16 0x9e /* Read Capacity (16) */
|
||||
#define SCSI_RD_DEFECT 0x37 /* Read Defect Data (O) */
|
||||
#define SCSI_READ_LONG 0x3E /* Read Long (O) */
|
||||
#define SCSI_REASS_BLK 0x07 /* Reassign Blocks (O) */
|
||||
#define SCSI_RCV_DIAG 0x1C /* Receive Diagnostic Results (O) */
|
||||
#define SCSI_RELEASE 0x17 /* Release Unit (MANDATORY) */
|
||||
#define SCSI_REZERO 0x01 /* Rezero Unit (O) */
|
||||
#define SCSI_SRCH_DAT_E 0x31 /* Search Data Equal (O) */
|
||||
#define SCSI_SRCH_DAT_H 0x30 /* Search Data High (O) */
|
||||
#define SCSI_SRCH_DAT_L 0x32 /* Search Data Low (O) */
|
||||
#define SCSI_SEEK6 0x0B /* Seek 6-Byte (O) */
|
||||
#define SCSI_SEEK10 0x2B /* Seek 10-Byte (O) */
|
||||
#define SCSI_SEND_DIAG 0x1D /* Send Diagnostics (MANDATORY) */
|
||||
#define SCSI_SET_LIMIT 0x33 /* Set Limits (O) */
|
||||
#define SCSI_START_STP 0x1B /* Start/Stop Unit (O) */
|
||||
#define SCSI_SYNC_CACHE 0x35 /* Synchronize Cache (O) */
|
||||
#define SCSI_VERIFY 0x2F /* Verify (O) */
|
||||
#define SCSI_WRITE6 0x0A /* Write 6-Byte (MANDATORY) */
|
||||
#define SCSI_WRITE10 0x2A /* Write 10-Byte (MANDATORY) */
|
||||
#define SCSI_WRT_VERIFY 0x2E /* Write and Verify (O) */
|
||||
#define SCSI_WRITE_LONG 0x3F /* Write Long (O) */
|
||||
#define SCSI_WRITE_SAME 0x41 /* Write Same (O) */
|
||||
|
||||
/**
|
||||
* struct scsi_platdata - stores information about SCSI controller
|
||||
*
|
||||
* @base: Controller base address
|
||||
* @max_lun: Maximum number of logical units
|
||||
* @max_id: Maximum number of target ids
|
||||
*/
|
||||
struct scsi_platdata {
|
||||
unsigned long base;
|
||||
unsigned long max_lun;
|
||||
unsigned long max_id;
|
||||
};
|
||||
|
||||
#if 0
|
||||
/* Operations for SCSI */
|
||||
struct scsi_ops {
|
||||
/**
|
||||
* exec() - execute a command
|
||||
*
|
||||
* @dev: SCSI bus
|
||||
* @cmd: Command to execute
|
||||
* @return 0 if OK, -ve on error
|
||||
*/
|
||||
int (*exec)(struct udevice *dev, struct scsi_cmd *cmd);
|
||||
|
||||
/**
|
||||
* bus_reset() - reset the bus
|
||||
*
|
||||
* @dev: SCSI bus to reset
|
||||
* @return 0 if OK, -ve on error
|
||||
*/
|
||||
int (*bus_reset)(struct udevice *dev);
|
||||
};
|
||||
|
||||
#define scsi_get_ops(dev) ((struct scsi_ops *)(dev)->driver->ops)
|
||||
|
||||
extern struct scsi_ops scsi_ops;
|
||||
|
||||
/**
|
||||
* scsi_exec() - execute a command
|
||||
*
|
||||
* @dev: SCSI bus
|
||||
* @cmd: Command to execute
|
||||
* @return 0 if OK, -ve on error
|
||||
*/
|
||||
int scsi_exec(struct udevice *dev, struct scsi_cmd *cmd);
|
||||
|
||||
/**
|
||||
* scsi_bus_reset() - reset the bus
|
||||
*
|
||||
* @dev: SCSI bus to reset
|
||||
* @return 0 if OK, -ve on error
|
||||
*/
|
||||
int scsi_bus_reset(struct udevice *dev);
|
||||
|
||||
/**
|
||||
* scsi_scan() - Scan all SCSI controllers for available devices
|
||||
*
|
||||
* @vebose: true to show information about each device found
|
||||
*/
|
||||
int scsi_scan(bool verbose);
|
||||
|
||||
/**
|
||||
* scsi_scan_dev() - scan a SCSI bus and create devices
|
||||
*
|
||||
* @dev: SCSI bus
|
||||
* @verbose: true to show information about each device found
|
||||
*/
|
||||
int scsi_scan_dev(struct udevice *dev, bool verbose);
|
||||
#endif
|
||||
|
||||
void scsi_low_level_init(int busdevfunc);
|
||||
void scsi_init(void);
|
||||
|
||||
#define SCSI_IDENTIFY 0xC0 /* not used */
|
||||
|
||||
/* Hardware errors */
|
||||
#define SCSI_SEL_TIME_OUT 0x00000101 /* Selection time out */
|
||||
#define SCSI_HNS_TIME_OUT 0x00000102 /* Handshake */
|
||||
#define SCSI_MA_TIME_OUT 0x00000103 /* Phase error */
|
||||
#define SCSI_UNEXP_DIS 0x00000104 /* unexpected disconnect */
|
||||
|
||||
#define SCSI_INT_STATE 0x00010000 /* unknown Interrupt number is stored in 16 LSB */
|
||||
|
||||
#endif /* _SCSI_H */
|
||||
1735
A58-AMTLDR/Src/sdmmc.c
Normal file
1735
A58-AMTLDR/Src/sdmmc.c
Normal file
File diff suppressed because it is too large
Load Diff
297
A58-AMTLDR/Src/sdmmc.h
Normal file
297
A58-AMTLDR/Src/sdmmc.h
Normal file
@ -0,0 +1,297 @@
|
||||
/*
|
||||
**********************************************************************
|
||||
Copyright (c)2007 Arkmicro Technologies Inc. All Rights Reserved
|
||||
Filename: sdmmc.h
|
||||
Version : 1.1
|
||||
Date : 2008.01.08
|
||||
Author : wx(Modify by Salem)
|
||||
Abstract: ark1610 soc sd driver
|
||||
History :
|
||||
***********************************************************************
|
||||
*/
|
||||
#ifndef SDMMC_H
|
||||
#define SDMMC_H
|
||||
|
||||
|
||||
#define SD_DEBUG 0
|
||||
|
||||
|
||||
typedef unsigned long ulong;
|
||||
typedef ulong lbaint_t;
|
||||
|
||||
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
|
||||
|
||||
|
||||
#define SDMMC_RW_SUCCES 0
|
||||
#define SDMMC_RW_TIMEOUT -1
|
||||
#define SDMMC_RW_DMAREAD_FAIL -2
|
||||
#define SDMMC_RW_DMAWRITE_FAIL -3
|
||||
#define SDMMC_RW_CMDTIMEROUT -4
|
||||
|
||||
|
||||
#define PWREN_ON 0x00000000 //turn on all card power
|
||||
#define PWREN_OFF 0xFFFFFFFF //turn off all card power
|
||||
#define CLK_CLKEN 0x0000ffff //
|
||||
#define CLK_CLKDIS 0x00000000 // disable clk
|
||||
#define CLK_DIV_INITIAL 0x00000010 //initial choose frequency
|
||||
#define CLK_DIV_NORMAL 0x00000000 //data transfers clk frequency
|
||||
#define CLK_SRC 0x00000000 //
|
||||
#define CMD_CHANG_CLK 0x80202000 //chang clk
|
||||
#define CMD_INITIAL_CLK 0x80008000 //initial clk before work
|
||||
#define CMD0_GO_IDLE 0x80000000 //go idle
|
||||
#define CMD1_MATCH_VCC 0x80000041 //turn on for match vcc
|
||||
#define CMD2_CID 0x800001c2 //initial card get CID
|
||||
#define CMD3_RCA 0x80000143 //comfire RCA to card
|
||||
#define CMD6_SWTICH 0x80000346 //switch function
|
||||
#define CMD7_SELECT_CARD 0x80000147 //select card
|
||||
#define CMD8_SPEC 0x80000048 //confire specfic
|
||||
#define CMD9_CSD 0x800001c9 //get CSD
|
||||
#define CMD10_CID 0x800001ca //get CID at transfers
|
||||
#define CMD12_STOP_STEARM 0x8000004c //stop block transfers
|
||||
#define CMD13_STATUS_CARD 0x8000014D //get card status
|
||||
#define CMD15_INACTIVE 0x8000000F //make card to inactive
|
||||
#define CMD16_SET_BLOCKLEN 0x80000150 //set card block length
|
||||
#define CMD17_READ_SINGLE 0x80000351 //single block read
|
||||
#define CMD18_READ_MUL 0x80001352 //multipe block read
|
||||
#define CMD23_PRE_ERASE 0x80000157 //pre erase for write
|
||||
#define CMD24_WRITE_SINGLE 0x80000758 //single block write
|
||||
#define CMD25_WRITE_MUL 0x80000759 //multipe block write
|
||||
#define CMD27_PROG_CSD 0x8000065b //programme csd
|
||||
#define CMD28_SET_PROTECT 0x8000015c //set protect
|
||||
#define CMD29_CLR_PROTECT 0x8000015d //clearn protect
|
||||
#define CMD30_SEND_WRITE 0x8000025e //get the status about protect
|
||||
#define CMD32_ERASESD_START 0x80000160 //set start erase SD card address
|
||||
#define CMD33_ERASESD_END 0x80000161 //set end erase SD card address
|
||||
#define CMD38_ERASE 0x80000166 //confirm erase
|
||||
#define CMD41_MATCH_VCC 0x80000169 //FOR SD
|
||||
#define CMD55_APP 0x80000177 //APP CMD
|
||||
#define ACMD6_WID 0x80000146 //set bus width
|
||||
#define ACMD13_GET_STATUS 0x8000024d //get status 512 bit
|
||||
#define ACMD42_DISCON_DATA3 0x8000016a //make data3 disconnect
|
||||
#define ACMD51_GET_CSR 0x80000273 //get card csr
|
||||
//=======================MMC set bus==========================
|
||||
#define CMD6_SWITH 0x80000446 //set bus width
|
||||
//================================================
|
||||
|
||||
#define MMC_ERASE_ARG 0x00000000
|
||||
|
||||
|
||||
#define MMC_CMD_GO_IDLE_STATE 0
|
||||
#define MMC_CMD_SEND_OP_COND 1
|
||||
#define MMC_CMD_ALL_SEND_CID 2
|
||||
#define MMC_CMD_SET_RELATIVE_ADDR 3
|
||||
#define MMC_CMD_SET_DSR 4
|
||||
#define MMC_CMD_SWITCH 6
|
||||
#define MMC_CMD_SELECT_CARD 7
|
||||
#define MMC_CMD_SEND_EXT_CSD 8
|
||||
#define MMC_CMD_SEND_CSD 9
|
||||
#define MMC_CMD_SEND_CID 10
|
||||
#define MMC_CMD_STOP_TRANSMISSION 12
|
||||
#define MMC_CMD_SEND_STATUS 13
|
||||
#define MMC_CMD_SET_BLOCKLEN 16
|
||||
#define MMC_CMD_READ_SINGLE_BLOCK 17
|
||||
#define MMC_CMD_READ_MULTIPLE_BLOCK 18
|
||||
#define MMC_CMD_SEND_TUNING_BLOCK 19
|
||||
#define MMC_CMD_SEND_TUNING_BLOCK_HS200 21
|
||||
#define MMC_CMD_SET_BLOCK_COUNT 23
|
||||
#define MMC_CMD_WRITE_SINGLE_BLOCK 24
|
||||
#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
|
||||
#define MMC_CMD_ERASE_GROUP_START 35
|
||||
#define MMC_CMD_ERASE_GROUP_END 36
|
||||
#define MMC_CMD_ERASE 38
|
||||
#define MMC_CMD_APP_CMD 55
|
||||
#define MMC_CMD_SPI_READ_OCR 58
|
||||
#define MMC_CMD_SPI_CRC_ON_OFF 59
|
||||
#define MMC_CMD_RES_MAN 62
|
||||
|
||||
#define MMC_CMD62_ARG1 0xefac62ec
|
||||
#define MMC_CMD62_ARG2 0xcbaea7
|
||||
|
||||
|
||||
#define SD_CMD_SEND_RELATIVE_ADDR 3
|
||||
#define SD_CMD_SWITCH_FUNC 6
|
||||
#define SD_CMD_SEND_IF_COND 8
|
||||
#define SD_CMD_SWITCH_UHS18V 11
|
||||
|
||||
#define SD_CMD_APP_SET_BUS_WIDTH 6
|
||||
#define SD_CMD_APP_SD_STATUS 13
|
||||
#define SD_CMD_ERASE_WR_BLK_START 32
|
||||
#define SD_CMD_ERASE_WR_BLK_END 33
|
||||
#define SD_CMD_APP_SEND_OP_COND 41
|
||||
#define SD_CMD_APP_SEND_SCR 51
|
||||
|
||||
#define MMC_RSP_PRESENT (1 << 0)
|
||||
#define MMC_RSP_136 (1 << 1) /* 136 bit response */
|
||||
#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
|
||||
#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
|
||||
#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
|
||||
|
||||
#define MMC_RSP_NONE (0)
|
||||
#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
|
||||
MMC_RSP_BUSY)
|
||||
#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
|
||||
#define MMC_RSP_R3 (MMC_RSP_PRESENT)
|
||||
#define MMC_RSP_R4 (MMC_RSP_PRESENT)
|
||||
#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
|
||||
#define OCR_BUSY 0x80000000
|
||||
#define OCR_HCS 0x40000000
|
||||
#define OCR_S18R 0x1000000
|
||||
#define OCR_VOLTAGE_MASK 0x007FFF80
|
||||
#define OCR_ACCESS_MODE 0x60000000
|
||||
|
||||
#define MMC_STATUS_MASK (~0x0206BF7F)
|
||||
#define MMC_STATUS_SWITCH_ERROR (1 << 7)
|
||||
#define MMC_STATUS_RDY_FOR_DATA (1 << 8)
|
||||
#define MMC_STATUS_CURR_STATE (0xf << 9)
|
||||
#define MMC_STATUS_ERROR (1 << 19)
|
||||
|
||||
#define MMC_STATE_PRG (7 << 9)
|
||||
|
||||
#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
|
||||
#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
|
||||
#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
|
||||
#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
|
||||
#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
|
||||
#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
|
||||
#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
|
||||
#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
|
||||
#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
|
||||
#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
|
||||
#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
|
||||
#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
|
||||
#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
|
||||
#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
|
||||
#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
|
||||
#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
|
||||
#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
|
||||
|
||||
#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
|
||||
#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
|
||||
addressed by index which are
|
||||
1 in value field */
|
||||
#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
|
||||
addressed by index, which are
|
||||
1 in value field */
|
||||
#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
|
||||
|
||||
#define SD_SWITCH_CHECK 0
|
||||
#define SD_SWITCH_SWITCH 1
|
||||
|
||||
/*
|
||||
* EXT_CSD fields
|
||||
*/
|
||||
#define EXT_CSD_ENH_START_ADDR 136 /* R/W */
|
||||
#define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
|
||||
#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
|
||||
#define EXT_CSD_PARTITION_SETTING 155 /* R/W */
|
||||
#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
|
||||
#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
|
||||
#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
|
||||
#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
|
||||
#define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
|
||||
#define EXT_CSD_WR_REL_PARAM 166 /* R */
|
||||
#define EXT_CSD_WR_REL_SET 167 /* R/W */
|
||||
#define EXT_CSD_RPMB_MULT 168 /* RO */
|
||||
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
|
||||
#define EXT_CSD_BOOT_BUS_WIDTH 177
|
||||
#define EXT_CSD_PART_CONF 179 /* R/W */
|
||||
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
|
||||
#define EXT_CSD_HS_TIMING 185 /* R/W */
|
||||
#define EXT_CSD_REV 192 /* RO */
|
||||
#define EXT_CSD_CARD_TYPE 196 /* RO */
|
||||
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
|
||||
#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
|
||||
#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
|
||||
#define EXT_CSD_BOOT_MULT 226 /* RO */
|
||||
#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
|
||||
|
||||
/*
|
||||
* EXT_CSD field definitions
|
||||
*/
|
||||
|
||||
#define EXT_CSD_CMD_SET_NORMAL (1 << 0)
|
||||
#define EXT_CSD_CMD_SET_SECURE (1 << 1)
|
||||
#define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
|
||||
#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
|
||||
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
|
||||
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
|
||||
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
|
||||
| EXT_CSD_CARD_TYPE_DDR_1_2V)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */
|
||||
/* SDR mode @1.8V I/O */
|
||||
#define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */
|
||||
/* SDR mode @1.2V I/O */
|
||||
#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_HS200_1_2V)
|
||||
|
||||
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
|
||||
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
|
||||
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
|
||||
#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
|
||||
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
|
||||
#define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */
|
||||
|
||||
#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
|
||||
#define EXT_CSD_TIMING_HS 1 /* HS */
|
||||
#define EXT_CSD_TIMING_HS200 2 /* HS200 */
|
||||
|
||||
#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
|
||||
#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
|
||||
#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
|
||||
#define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
|
||||
|
||||
#define EXT_CSD_BOOT_ACK(x) (x << 6)
|
||||
#define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
|
||||
#define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
|
||||
|
||||
#define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
|
||||
#define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
|
||||
#define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)
|
||||
|
||||
#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
|
||||
#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
|
||||
#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
|
||||
|
||||
#define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
|
||||
|
||||
#define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
|
||||
#define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
|
||||
|
||||
#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
|
||||
|
||||
#define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
|
||||
#define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
|
||||
|
||||
|
||||
#define MMC_DATA_READ 1
|
||||
#define MMC_DATA_WRITE 2
|
||||
|
||||
/* Maximum block size for MMC */
|
||||
#define MMC_MAX_BLOCK_LEN 512
|
||||
|
||||
struct mmc_cmd {
|
||||
USHORT cmdidx;
|
||||
UINT resp_type;
|
||||
UINT cmdarg;
|
||||
UINT response[4];
|
||||
};
|
||||
|
||||
struct mmc_data {
|
||||
union {
|
||||
char *dest;
|
||||
const char *src; /* src buffers don't get written to */
|
||||
};
|
||||
UINT flags;
|
||||
UINT blocks;
|
||||
UINT blocksize;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
75
A58-AMTLDR/Src/spi.h
Normal file
75
A58-AMTLDR/Src/spi.h
Normal file
@ -0,0 +1,75 @@
|
||||
#ifndef __SPI_H__
|
||||
#define __SPI_H__
|
||||
|
||||
#define MAX_WAIT_LOOP_COUNT 100000
|
||||
|
||||
#define SPI_WRITE_ENABLE 0x06
|
||||
#define SPI_WRITE_DISABLE 0x04
|
||||
#define SPI_READ_STATUS 0x05
|
||||
#define SPI_READ_STATUS2 0x35
|
||||
#define SPI_READ_STATUS3 0x15
|
||||
#define SPI_WRITE_STATUS 0x01
|
||||
#define SPI_WRITE_STATUS2 0x31
|
||||
#define SPI_READ_DATA 0x03
|
||||
|
||||
#define SPI_4BYTEADDR_READ_DATA 0x13
|
||||
|
||||
#define SPI_FAST_READ 0x0B
|
||||
#define SPI_PAGE_PROGRAM 0x02
|
||||
#define SPI_4BYTEADD_PAGE_PROGRAM 0x12
|
||||
#define SPI_SECTOR_ERASE 0x20
|
||||
#define SPI_4BYTEADD_SECTOR_ERASE 0x21
|
||||
#define SPI_SECTOR_ERASE_1 0xD7
|
||||
#define SPI_BLOCK_ERASE 0xD8
|
||||
#define SPI_4BYTEADD_BLOCK_ERASE 0xDC
|
||||
#define SPI_BLOCK_ERASE_1 0x52
|
||||
#define SPI_CHIP_ERASE 0xC7
|
||||
#define SPI_CHIP_ERASE_1 0x60
|
||||
#define SPI_POWER_DOWN 0xB9
|
||||
#define SPI_READ_JEDEC_ID 0x9F
|
||||
#define SPI_READ_ID_1 0xAB
|
||||
#define SPI_MF_DEVICE_ID 0x90
|
||||
#define SPI_MF_DEVICE_ID_1 0x15
|
||||
#define SPI_READ_ELECTRON_SIGN 0xAB
|
||||
|
||||
#define SPI_MF_WINBOND 0xEF
|
||||
#define SPI_MF_EON 0x1C
|
||||
#define SPI_MF_AMIC 0x37
|
||||
#define SPI_MF_ATMEL 0x1F
|
||||
#define SPI_MF_SST 0xBF
|
||||
#define SPI_MF_MXIC 0xC2
|
||||
|
||||
#define SPI_ENABLE_4BYTE_MODE 0xB7
|
||||
#define SPI_DISABLE_4BYTE_MODE 0xE9
|
||||
#define SPI_QUAD_IO_READ_DATA 0xEB
|
||||
|
||||
|
||||
#define SPI_BUSY (1<<0)
|
||||
#define SPIFLASH_WRITEENABLE (1<<1)
|
||||
|
||||
#define SPI_QE (1 << 1)
|
||||
|
||||
#define SPI_WRITE_DMA
|
||||
#define SPI_READ_DMA
|
||||
|
||||
#define WORDSPERPAGE 64
|
||||
#define BYTESPERPAGE 256
|
||||
#define PAGESPERSECTORS 16
|
||||
#define SECTORSPERBLOCK 16
|
||||
#define BLOCKSPERFLASH 64
|
||||
|
||||
|
||||
#define BYTESPERBLOCK (BYTESPERPAGE*PAGESPERSECTORS*SECTORSPERBLOCK)
|
||||
#define BYTESPERSECTOR (BYTESPERPAGE*PAGESPERSECTORS)
|
||||
|
||||
|
||||
#define PAGES_PER_BLOCK 64
|
||||
#define BYTES_PER_PAGE 2048
|
||||
|
||||
void SpiSelectPad(void);
|
||||
int SpiInit(void);
|
||||
void SpiBurnLoad(void);
|
||||
void SpiReadId(void);
|
||||
|
||||
#endif
|
||||
|
||||
51
A58-AMTLDR/Src/sysinfo.c
Normal file
51
A58-AMTLDR/Src/sysinfo.c
Normal file
@ -0,0 +1,51 @@
|
||||
#include "amt630h.h"
|
||||
#include "sysinfo.h"
|
||||
#include "crc32.h"
|
||||
|
||||
extern int SpiReadSysInfo(SysInfo *info);
|
||||
extern void SpiWriteSysInfo(SysInfo *info);
|
||||
extern int EmmcReadSysInfo(SysInfo *info);
|
||||
extern void EmmcWriteSysInfo(SysInfo *info);
|
||||
|
||||
static SysInfo sysinfo = {0};
|
||||
|
||||
SysInfo *GetSysInfo(void)
|
||||
{
|
||||
return &sysinfo;
|
||||
}
|
||||
|
||||
void SetDefaultSysInfo(void)
|
||||
{
|
||||
#if DEVICE_TYPE_SELECT != EMMC_FLASH
|
||||
sysinfo.update_media_type = UPDATE_MEDIA_SD;
|
||||
#else
|
||||
sysinfo.update_media_type = UPDATE_MEDIA_USB;
|
||||
sysinfo.loader_offset = LOADER_OFFSET;
|
||||
sysinfo.loader_size = LOADER_MAX_SIZE;
|
||||
#endif
|
||||
sysinfo.image_offset = IMAGE_OFFSET;
|
||||
sysinfo.update_status = UPDATE_STATUS_START;
|
||||
sysinfo.stepldr_offset = STEPLDRB_OFFSET;
|
||||
sysinfo.stepldr_size = STEPLDR_MAX_SIZE;
|
||||
}
|
||||
|
||||
int ReadSysInfo(void)
|
||||
{
|
||||
#if DEVICE_TYPE_SELECT != EMMC_FLASH
|
||||
return SpiReadSysInfo(&sysinfo);
|
||||
#else
|
||||
return EmmcReadSysInfo(&sysinfo);
|
||||
#endif
|
||||
}
|
||||
|
||||
void SaveSysInfo(SysInfo *info)
|
||||
{
|
||||
if (!info)
|
||||
info = &sysinfo;
|
||||
info->checksum = xcrc32((unsigned char*)info, sizeof(SysInfo) - 4, 0xffffffff);
|
||||
#if DEVICE_TYPE_SELECT != EMMC_FLASH
|
||||
SpiWriteSysInfo(info);
|
||||
#else
|
||||
EmmcWriteSysInfo(info);
|
||||
#endif
|
||||
}
|
||||
32
A58-AMTLDR/Src/sysinfo.h
Normal file
32
A58-AMTLDR/Src/sysinfo.h
Normal file
@ -0,0 +1,32 @@
|
||||
#ifndef _SYSINFO_H_
|
||||
#define _SYSINFO_H_
|
||||
|
||||
#define UPDATE_MEDIA_SD 0
|
||||
#define UPDATE_MEDIA_USB 1
|
||||
#define UPDATE_MEDIA_UART 2
|
||||
|
||||
#define UPDATE_STATUS_START 0
|
||||
#define UPDATE_STATUS_END 1
|
||||
|
||||
typedef struct {
|
||||
unsigned int app_checksum;
|
||||
unsigned int stepldr_offset;
|
||||
unsigned int stepldr_size;
|
||||
unsigned int update_media_type;
|
||||
unsigned int update_status;
|
||||
unsigned int app_size;
|
||||
unsigned int image_offset;
|
||||
unsigned int loader_offset;
|
||||
unsigned int loader_size;
|
||||
unsigned int reserved[10];
|
||||
unsigned int upgrade_flag;
|
||||
unsigned int upgrade_appsize;
|
||||
unsigned int checksum;
|
||||
} SysInfo;
|
||||
|
||||
SysInfo *GetSysInfo(void);
|
||||
void SetDefaultSysInfo(void);
|
||||
int ReadSysInfo(void);
|
||||
void SaveSysInfo(SysInfo *info);
|
||||
|
||||
#endif
|
||||
78
A58-AMTLDR/Src/timer.c
Normal file
78
A58-AMTLDR/Src/timer.c
Normal file
@ -0,0 +1,78 @@
|
||||
#include "amt630h.h"
|
||||
#include "timer.h"
|
||||
|
||||
#define APBTMR_CONTROL_ENABLE (1 << 0)
|
||||
/* 1: periodic, 0:free running. */
|
||||
#define APBTMR_CONTROL_MODE_PERIODIC (1 << 1)
|
||||
#define APBTMR_CONTROL_INT_DISABLE (1 << 2)
|
||||
|
||||
#define TIMER_CLK CLK_24MHZ
|
||||
#define TIMER_PERIOD 1000000
|
||||
#define TIMER_LOAD_VAL 0xffffffff
|
||||
|
||||
static unsigned long timestamp;
|
||||
static unsigned long lastdec;
|
||||
|
||||
void timer_init(void)
|
||||
{
|
||||
rTIMER0_CONTROL = 0;
|
||||
rTIMER0_LOAD_COUNT = TIMER_LOAD_VAL;
|
||||
/* No timer interrupt */
|
||||
rTIMER0_CONTROL = APBTMR_CONTROL_INT_DISABLE |
|
||||
APBTMR_CONTROL_MODE_PERIODIC | APBTMR_CONTROL_ENABLE;
|
||||
}
|
||||
|
||||
void udelay(unsigned long usec)
|
||||
{
|
||||
long tmo = usec * (TIMER_CLK / TIMER_PERIOD);
|
||||
unsigned long last = rTIMER0_CURRENT_VALUE;
|
||||
unsigned long now;
|
||||
|
||||
while (tmo > 0) {
|
||||
now = rTIMER0_CURRENT_VALUE;
|
||||
if (last >= now)
|
||||
tmo -= last - now;
|
||||
else
|
||||
tmo -= last + (TIMER_LOAD_VAL - now);
|
||||
last = now;
|
||||
}
|
||||
}
|
||||
|
||||
void mdelay(unsigned long msec)
|
||||
{
|
||||
udelay(1000*msec);
|
||||
}
|
||||
|
||||
#if 0
|
||||
void reset_timer_masked (void)
|
||||
{
|
||||
/* reset time */
|
||||
lastdec = rTIMER0_CURRENT_VALUE; /* capure current decrementer value time */
|
||||
timestamp = 0; /* start "advancing" time stamp from 0 */
|
||||
}
|
||||
#endif
|
||||
|
||||
ULONG get_timer_masked (void)
|
||||
{
|
||||
unsigned long now = rTIMER0_CURRENT_VALUE; /* current tick value */
|
||||
|
||||
if (lastdec >= now) { /* normal mode (non roll) */
|
||||
/* normal mode */
|
||||
timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
|
||||
} else { /* we have overflow of the count down timer */
|
||||
/* nts = ts + ld + (TLV - now)
|
||||
* ts=old stamp, ld=time that passed before passing through -1
|
||||
* (TLV-now) amount of time after passing though -1
|
||||
* nts = new "advancing time stamp"...it could also roll and cause problems.
|
||||
*/
|
||||
timestamp += lastdec + (TIMER_LOAD_VAL - now);
|
||||
}
|
||||
lastdec = now;
|
||||
|
||||
return timestamp / DIV_ROUND_UP(TIMER_CLK, TIMER_PERIOD) / 1000;
|
||||
}
|
||||
|
||||
ULONG get_timer(ULONG base)
|
||||
{
|
||||
return get_timer_masked () - base;
|
||||
}
|
||||
12
A58-AMTLDR/Src/timer.h
Normal file
12
A58-AMTLDR/Src/timer.h
Normal file
@ -0,0 +1,12 @@
|
||||
#ifndef __TIMER_H__
|
||||
#define __TIMER_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
extern void timer_init(void);
|
||||
//extern void reset_timer_masked (void);
|
||||
extern void udelay(unsigned long usec);
|
||||
extern void mdelay(unsigned long msec);
|
||||
extern ULONG get_timer(ULONG base);
|
||||
|
||||
#endif
|
||||
128
A58-AMTLDR/Src/typedef.h
Normal file
128
A58-AMTLDR/Src/typedef.h
Normal file
@ -0,0 +1,128 @@
|
||||
#ifndef TYPEDEF_HEAD_H__
|
||||
#define TYPEDEF_HEAD_H__
|
||||
|
||||
#ifndef _INTEGER
|
||||
|
||||
/* These types must be 16-bit, 32-bit or larger integer */
|
||||
typedef int INT;
|
||||
typedef unsigned int UINT;
|
||||
|
||||
/* These types must be 8-bit integer */
|
||||
typedef signed char CHAR;
|
||||
typedef unsigned char UCHAR;
|
||||
typedef unsigned char BYTE;
|
||||
|
||||
/* These types must be 16-bit integer */
|
||||
typedef short SHORT;
|
||||
typedef unsigned short USHORT;
|
||||
typedef unsigned short WORD;
|
||||
|
||||
/* These types must be 32-bit integer */
|
||||
typedef long LONG;
|
||||
typedef unsigned long ULONG;
|
||||
typedef unsigned long DWORD;
|
||||
|
||||
#define _INTEGER
|
||||
#endif
|
||||
|
||||
|
||||
typedef char INT8;
|
||||
typedef unsigned char UINT8;
|
||||
typedef short INT16;
|
||||
typedef unsigned short UINT16;
|
||||
typedef unsigned short HWORD;
|
||||
typedef signed int INT32;
|
||||
typedef unsigned int UINT32;
|
||||
typedef unsigned long COLORREF;
|
||||
typedef unsigned long long UINT64;
|
||||
|
||||
typedef void VOID;
|
||||
typedef void * P_VOID;
|
||||
|
||||
typedef unsigned char u8;
|
||||
typedef unsigned short u16;
|
||||
typedef unsigned int u32;
|
||||
|
||||
typedef int bool;
|
||||
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#if 0
|
||||
#define EPERM 1 /* Operation not permitted */
|
||||
#define ENOENT 2 /* No such file or directory */
|
||||
#define ESRCH 3 /* No such process */
|
||||
#define EINTR 4 /* Interrupted system call */
|
||||
#define EIO 5 /* I/O error */
|
||||
#define ENXIO 6 /* No such device or address */
|
||||
#define E2BIG 7 /* Argument list too long */
|
||||
#define ENOEXEC 8 /* Exec format error */
|
||||
#define EBADF 9 /* Bad file number */
|
||||
#define ECHILD 10 /* No child processes */
|
||||
#define EAGAIN 11 /* Try again */
|
||||
#define ENOMEM 12 /* Out of memory */
|
||||
#define EACCES 13 /* Permission denied */
|
||||
#define EFAULT 14 /* Bad address */
|
||||
#define ENOTBLK 15 /* Block device required */
|
||||
#define EBUSY 16 /* Device or resource busy */
|
||||
#define EEXIST 17 /* File exists */
|
||||
#define EXDEV 18 /* Cross-device link */
|
||||
#define ENODEV 19 /* No such device */
|
||||
#define ENOTDIR 20 /* Not a directory */
|
||||
#define EISDIR 21 /* Is a directory */
|
||||
#define EINVAL 22 /* Invalid argument */
|
||||
#define ENFILE 23 /* File table overflow */
|
||||
#define EMFILE 24 /* Too many open files */
|
||||
#define ENOTTY 25 /* Not a typewriter */
|
||||
#define ETXTBSY 26 /* Text file busy */
|
||||
#define EFBIG 27 /* File too large */
|
||||
#define ENOSPC 28 /* No space left on device */
|
||||
#define ESPIPE 29 /* Illegal seek */
|
||||
#define EROFS 30 /* Read-only file system */
|
||||
#define EMLINK 31 /* Too many links */
|
||||
#define EPIPE 32 /* Broken pipe */
|
||||
#define EDOM 33 /* Math argument out of domain of func */
|
||||
#define ERANGE 34 /* Math result not representable */
|
||||
|
||||
#define EDEADLK 35 /* Resource deadlock would occur */
|
||||
#define ENAMETOOLONG 36 /* File name too long */
|
||||
#define ENOLCK 37 /* No record locks available */
|
||||
|
||||
#define ENOSYS 38 /* Invalid system call number */
|
||||
|
||||
#define ENOTEMPTY 39 /* Directory not empty */
|
||||
#define ELOOP 40 /* Too many symbolic links encountered */
|
||||
#define EWOULDBLOCK EAGAIN /* Operation would block */
|
||||
#define ENOMSG 42 /* No message of desired type */
|
||||
#define EIDRM 43 /* Identifier removed */
|
||||
#define ECHRNG 44 /* Channel number out of range */
|
||||
#define EL2NSYNC 45 /* Level 2 not synchronized */
|
||||
#define EL3HLT 46 /* Level 3 halted */
|
||||
#define EL3RST 47 /* Level 3 reset */
|
||||
#define ELNRNG 48 /* Link number out of range */
|
||||
#define EUNATCH 49 /* Protocol driver not attached */
|
||||
#define ENOCSI 50 /* No CSI structure available */
|
||||
#define EL2HLT 51 /* Level 2 halted */
|
||||
#define EBADE 52 /* Invalid exchange */
|
||||
#define EBADR 53 /* Invalid request descriptor */
|
||||
#define EXFULL 54 /* Exchange full */
|
||||
#define ENOANO 55 /* No anode */
|
||||
#define EBADRQC 56 /* Invalid request code */
|
||||
#define EBADSLT 57 /* Invalid slot */
|
||||
#endif
|
||||
|
||||
#define EAGAIN 11 /* Try again */
|
||||
#define ETIMEDOUT 110 /* Connection timed out */
|
||||
|
||||
|
||||
typedef struct {
|
||||
char Present; //1 - card is in the socket
|
||||
char Changed; //1 - card changed(card is in socket)
|
||||
unsigned int SecNum; // the whole setctor number
|
||||
} FS_CARD;
|
||||
|
||||
#endif
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user